137 lines
3.5 KiB
ArmAsm
137 lines
3.5 KiB
ArmAsm
/* $NetBSD: romboot.S,v 1.6 2002/02/16 05:26:02 shin Exp $ */
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/*-
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* Copyright (c) 2001, 2002 Takao Shinohara.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* simple boot loader for ROM
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*
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* supported platform: LASER5 L-Router(L-Board)
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*/
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#define zero $0
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#define AT $at
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#define v0 $2
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#define v1 $3
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#define a0 $4
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#define a1 $5
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#define a2 $6
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#define a3 $7
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#define t0 $8
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#define t1 $9
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#define t2 $10
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#define t3 $11
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#define t4 $12
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#define t5 $13
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#define t6 $14
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#define t7 $15
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#define s0 $16
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#define s1 $17
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#define s2 $18
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#define s3 $19
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#define s4 $20
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#define s5 $21
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#define s6 $22
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#define s7 $23
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#define t8 $24
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#define t9 $25
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#define k0 $26
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#define k1 $27
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#define gp $28
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#define sp $29
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#define s8 $30
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#define ra $31
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#define MIPS_KSEG0_START 0x80000000
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#define MIPS_KSEG1_START 0xa0000000
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#define KSEG1_KSEG0_DIFF (MIPS_KSEG1_START - MIPS_KSEG0_START)
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#define KERNEL_LOADADDR 0x80001000
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#define MAX_KERNEL_SIZE (1024*1024*6) # 6MB
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#define MAX_DCACHE_SIZE (1024*32) # 32KB
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.text
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.set noreorder
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.globl _start
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_start:
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bal 1f # ra = ROM address + 8
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nop
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1: subu a0, ra, 8 # a0 = ROM address(kseg1)
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subu a0, KSEG1_KSEG0_DIFF # convert to kseg0 address
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move s0, a0 # keep it in s0
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la t0, _etext
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la t1, _ftext
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subu t0, t1 # t0 = size of boot loader
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addu a0, t0 # a0 = kernel address in ROM
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li a1, KERNEL_LOADADDR
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li t2, MAX_KERNEL_SIZE # max kernel size = 6MB - boot
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subu t2, t0
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addu t2, a1 # kernel end address
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la t9, 2f
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addu t9, s0
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jr t9 # jump to cached address
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nop
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2:
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lw v0, 0(a0)
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sw v0, 0(a1)
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addu a0, 4
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bltu a1, t2, 2b
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addu a1, 4 # BDSLOT
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/* purge data cache */
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li v0, MAX_DCACHE_SIZE
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3: lw zero, 0(a1)
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addu a1, 4
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bnez v0, 3b
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subu v0, 4 # BDSLOT
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li sp, KERNEL_LOADADDR # initialize stack pointer
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li a0, 1 # argc = 1
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addu a1, sp, -16 # argv
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la t0, argv0
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addu t0, s0
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sw t0, 0(a1) # argv[0] = "netbsd"
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sw zero, 4(a1) # argv[1] = NULL
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la a2, bootinfo
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addu a2, s0
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move a3, zero
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li t9, KERNEL_LOADADDR
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jr t9
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nop
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argv0: .asciiz "netbsd"
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bootinfo:
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.word 34 # len
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.word 0x13536135 # magic
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.word 0 # fb_addr
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.word 0, 0 # fb_line_bytes, fb_width, fb_height, fb_type
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.word 2 # BI_CNUSE_SERIAL
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.word 0x04104500 # VR4122
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.word 0x03810200 # LASER5 L-BOARD
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/*
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* kernel binary image begins here.
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*/
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