145 lines
4.6 KiB
C
145 lines
4.6 KiB
C
/* $NetBSD: acemidi.c,v 1.12 2006/07/13 22:56:02 gdamore Exp $ */
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/*-
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* Copyright (c) 2001 Ben Harris
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: acemidi.c,v 1.12 2006/07/13 22:56:02 gdamore Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <dev/podulebus/podulebus.h>
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#include <dev/podulebus/podules.h>
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#include <dev/podulebus/acemidireg.h>
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#include <sys/termios.h>
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#include <dev/ic/comvar.h>
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#include <dev/ic/comreg.h>
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struct acemidi_softc {
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struct device sc_dev;
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};
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struct com_acemidi_softc {
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struct com_softc sc_com;
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struct evcnt sc_intrcnt;
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};
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static int acemidi_match(struct device *, struct cfdata *, void *);
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static void acemidi_attach(struct device *, struct device *, void *);
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static int com_acemidi_match(struct device *, struct cfdata *, void *);
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static void com_acemidi_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(acemidi, sizeof(struct acemidi_softc),
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acemidi_match, acemidi_attach, NULL, NULL);
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CFATTACH_DECL(com_acemidi, sizeof(struct com_acemidi_softc),
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com_acemidi_match, com_acemidi_attach, NULL, NULL);
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static int
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acemidi_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct podulebus_attach_args *pa = aux;
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if (pa->pa_product == PODULE_MIDICONNECT)
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return 1;
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return 0;
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}
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static void
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acemidi_attach(struct device *parent, struct device *self, void *aux)
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{
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/* struct acemidi_softc *sc = device_private(self); */
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/* struct podulebus_attach_args *pa = aux; */
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printf("\n");
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config_found_ia(self, "acemidi", aux, NULL);
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}
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static int
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com_acemidi_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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return 1;
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}
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static void
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com_acemidi_attach(struct device *parent, struct device *self, void *aux)
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{
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struct com_acemidi_softc *sc = device_private(self);
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struct com_softc *csc = &sc->sc_com;
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struct podulebus_attach_args *pa = aux;
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bus_space_handle_t ioh;
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bus_space_tag_t iot;
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bus_addr_t iobase;
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iot = pa->pa_fast_t;
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iobase = pa->pa_fast_base + ACEMIDI_16550_BASE;
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bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh);
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COM_INIT_REGS(csc->sc_regs, iot, ioh, iobase);
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csc->sc_frequency = ACEMIDI_16550_FREQ;
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com_attach_subr(csc);
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evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
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self->dv_xname, "intr");
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podulebus_irq_establish(pa->pa_ih, IPL_SERIAL, comintr, sc,
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&sc->sc_intrcnt);
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}
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/*
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* Stray IRQ bug:
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*
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* Occasionally, when receiving, we get a stray IRQ. Sometimes, the interrupt
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* bit on the unixbp reads as clear. In any case, comintr() gets an IIR
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* of 0xc1 (no interrupts pending).
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*
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* The behaviour can be observed with a logic probe:
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*
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* Channel 1 to PIRQ* (pin 19 on IC3 on A540 backplane)
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* Channel 2 to INTR on 16550
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* trigger on ch1 low, ch2 falling
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* 2 us/div
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*
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* This catches cases where the 16550 de-asserts the interrupt before
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* irq_handler is entered and disables the interrupt at unixbp (by calling
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* splhigh()).
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*
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* This gets us 5us pulses on INTR and PIRQ*. Now to work out why.
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*
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* Connecting channel 3 to the CS2* pin on the 16550 shows it high throughout,
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* so the interrupt isn't being cleared by the host. MR, similarly, is low
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* throughout, so it's not being cleared by a reset.
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*/
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