147 lines
4.7 KiB
C++
147 lines
4.7 KiB
C++
/* -*-C++-*- $NetBSD: mips_arch.h,v 1.1 2001/02/09 18:35:05 uch Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by UCHIYAMA Yasushi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _HPCBOOT_MIPS_ARCH_H_
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#define _HPCBOOT_MIPS_ARCH_H_
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#include <hpcboot.h>
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#include <arch.h>
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class Console;
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class MIPSArchitecture : public Architecture {
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protected:
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typedef void(*boot_func_t)(struct BootArgs *, struct PageTag *);
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int _kmode;
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boot_func_t _boot_func;
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public:
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MIPSArchitecture(Console *&, MemoryManager *&);
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virtual ~MIPSArchitecture(void);
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virtual BOOL init(void);
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BOOL setupLoader(void);
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virtual void systemInfo(void);
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virtual void cacheFlush(void) = 0;
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void jump(paddr_t info, paddr_t pvce);
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};
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#define DI() \
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__asm(".set noreorder;" \
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"nop;" \
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"mtc0 zero, $12;" \
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"nop;nop;nop;" /* CP0 hazard for R4000 */ \
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".set reorder")
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#define GET_SR(x) \
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__asm(".set noreorder;" \
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"mfc0 t0, $12;" \
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"sw t0,(%0);" \
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".set reorder", &(x));
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#define SET_SR(x) \
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__asm(".set noreorder;" \
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"lw t0,(%0);" \
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"nop;" \
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"mtc0 t0, $12;" \
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"nop;nop;nop;" /* CP0 hazard for R4000 */ \
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".set reorder", &(x));
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/*
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* 2nd-bootloader. make sure that PIC and its size is lower than page size.
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* and can't call subroutine.
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* naked funciton can't use stack. if you want to use, remove its declare.
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* interrupts are disabled. but if access kuseg,(should not occur)
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* it causes TLB exception and then Windows CE enable interrupts again.
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*/
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#define BOOT_FUNC_(x) \
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__declspec(naked) void \
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x##::boot_func(struct BootArgs *bi, struct PageTag *p) \
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{ \
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/* disable interrupt */ \
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DI(); \
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/* set kernel image */ \
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__asm(".set noreorder;" \
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"move t6, a1;" /* p */ \
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"li t1, 0xffffffff;" \
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"page_start:" \
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"beq t6, t1, page_end;" \
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"move t7, t6;" \
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"lw t6, 0(t7);" /* p = next */ \
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"lw t0, 4(t7);" /* src */ \
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"lw t4, 8(t7);" /* dst */ \
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"lw t2, 12(t7);" /* sz */ \
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"beq t0, t1, page_clear;" \
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"addu t5, t4, t2;" /* dst + sz */ \
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"page_copy:" \
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"lw t3, 0(t0);" /* bcopy */ \
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"sw t3, 0(t4);" \
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"addiu t4, t4, 4;" \
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"bltu t4, t5, page_copy;" \
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"addiu t0, t0, 4;" \
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"b page_start;" \
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"nop;" \
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"page_clear:" \
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"sw zero, 0(t4);" /* bzero */ \
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"addiu t4, t4, 4;" \
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"bltu t4, t5, page_clear;" \
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"nop;" \
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"b page_start;" \
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"nop;" \
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"page_end:" \
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"nop;" \
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".set reorder"); \
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\
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/* Cache flush for kernel */ \
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MIPS_##x##_CACHE_FLUSH(); \
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\
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/* jump to kernel entry */ \
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__asm(".set noreorder;" \
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"move t0, a0;" \
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"lw t1, 0(t0);" \
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"lw a0, 4(t0);" \
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"lw a1, 8(t0);" \
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"lw a2, 12(t0);" \
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"jr t1;" \
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"nop;" \
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".set reorder"); \
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}
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#endif // _HPCBOOT_MIPS_ARCH_H_
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