182 lines
5.4 KiB
C++
182 lines
5.4 KiB
C++
/* $NetBSD: arm_arch.cpp,v 1.1 2001/02/09 18:34:49 uch Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by UCHIYAMA Yasushi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arm/arm_arch.h>
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#include <console.h>
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#include <memory.h>
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#include <arm/arm_sa1100.h>
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ARMArchitecture::ARMArchitecture(Console *&cons, MemoryManager *&mem)
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: Architecture(cons, mem)
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{
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DPRINTF((TEXT("ARM architecture.\n")));
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}
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ARMArchitecture::~ARMArchitecture(void)
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{
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}
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void
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ARMArchitecture::systemInfo()
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{
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Architecture::systemInfo();
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_kmode = SetKMode(1);
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DI();
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if ((GetCPSR() & 0x1f) != 0x1f)
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DPRINTF((TEXT("can't change to System mode\n")));
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DPRINTF((TEXT("Reg0 :%08x\n"), GetCop15Reg0()));
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DPRINTF((TEXT("Reg1 :%08x\n"), GetCop15Reg1()));
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DPRINTF((TEXT("Reg2 :%08x\n"), GetCop15Reg2()));
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DPRINTF((TEXT("Reg3 :%08x\n"), GetCop15Reg3()));
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DPRINTF((TEXT("Reg5 :%08x\n"), GetCop15Reg5()));
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DPRINTF((TEXT("Reg6 :%08x\n"), GetCop15Reg6()));
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DPRINTF((TEXT("Reg13:%08x\n"), GetCop15Reg13()));
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DPRINTF((TEXT("Reg14:%08x\n"), GetCop15Reg14()));
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DPRINTF((TEXT("CPSR :%08x\n"), GetCPSR()));
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EI();
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SetKMode(_kmode);
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}
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BOOL
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ARMArchitecture::init(void)
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{
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if (!_mem->init()) {
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DPRINTF((TEXT("can't initialize memory manager.\n")));
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return FALSE;
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}
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// set D-RAM information
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_mem->loadBank(DRAM_BANK0_START, DRAM_BANK_SIZE);
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_mem->loadBank(DRAM_BANK1_START, DRAM_BANK_SIZE);
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_mem->loadBank(DRAM_BANK2_START, DRAM_BANK_SIZE);
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_mem->loadBank(DRAM_BANK3_START, DRAM_BANK_SIZE);
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return TRUE;
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}
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BOOL
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ARMArchitecture::setupLoader()
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{
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vaddr_t v;
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vsize_t sz = BOOT_FUNC_END - BOOT_FUNC_START;
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// chcek 2nd bootloader size.
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if (sz > _mem->getPageSize()) {
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DPRINTF((TEXT("2nd bootloader size(%dbyte) is larger than page size(%d).\n"),
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sz, _mem->getPageSize()));
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return FALSE;
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}
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// get physical mapped page and copy loader to there.
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// don't writeback D-cache here. make sure to writeback before jump.
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if (!_mem->getPage(v , _loader_addr)) {
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DPRINTF((TEXT("can't get page for 2nd loader.\n")));
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return FALSE;
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}
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DPRINTF((TEXT("2nd bootloader vaddr=0x%08x paddr=0x%08x\n"),
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(unsigned)v,(unsigned)_loader_addr));
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memcpy(reinterpret_cast <LPVOID>(v),
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reinterpret_cast <LPVOID>(BOOT_FUNC_START), sz);
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DPRINTF((TEXT("2nd bootloader copy done.\n")));
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return TRUE;
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}
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void
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ARMArchitecture::jump(paddr_t info, paddr_t pvec)
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{
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kaddr_t sp;
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vaddr_t v;
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paddr_t p;
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// stack for bootloader
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_mem->getPage(v, p);
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sp = ptokv(p);
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// writeback whole D-cache
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WritebackDCache();
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SetKMode(1);
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FlatJump(info, pvec, sp, _loader_addr);
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// NOTREACHED
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}
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void
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ARMArchitecture::testFramebuffer()
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{
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// get frame buffer address from LCD controller register.
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paddr_t fbaddr_p = _mem->readPhysical4(0xb0100010); // 0xc0002e00
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// map frame buffer
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vaddr_t fbaddr_v = _mem->mapPhysicalPage(fbaddr_p, 0x50000,
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PAGE_READWRITE);
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// test frame buffer
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int j, k;
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DI();
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for (j = 0; j < 480; j++)
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for (k = 0; k < 640; k++)
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VOLATILE_REF8(fbaddr_v + 0x200 + j * 640 + k)
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= j * k & 0xff;
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for (j = 120; j < 360; j++)
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for (k = 120; k < 520; k++)
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VOLATILE_REF8(fbaddr_v + 0x200 + j * 640 + k) = 0x3;
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EI();
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_mem->unmapPhysicalPage(fbaddr_v);
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}
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void
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ARMArchitecture::testUART()
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{
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#define TBY VOLATILE_REF(uart + 0x20)
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#define UTDR VOLATILE_REF(uart + 0x14)
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#define TBY_BUSY while (TBY & 0x1)
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#define UTDR_PUTCHAR(c) (UTDR =(c))
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#define _(c) \
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__BEGIN_MACRO \
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TBY_BUSY; \
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UTDR_PUTCHAR(c); \
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__END_MACRO
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vaddr_t uart =
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_mem->mapPhysicalPage(0x80050000, 0x100, PAGE_READWRITE);
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_('H');_('e');_('l');_('l');_('o');_(' ');
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_('W');_('o');_('r');_('l');_('d');_('\r');_('\n');
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_mem->unmapPhysicalPage(uart);
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}
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