299 lines
7.5 KiB
C
299 lines
7.5 KiB
C
/* $NetBSD: asic.c,v 1.34 1999/03/18 06:37:35 simonb Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/tc/tcvar.h>
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#include <dev/tc/ioasicvar.h>
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#include <machine/bus.h> /* wbflush() */
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#include <machine/autoconf.h>
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#ifdef alpha
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#include <machine/rpb.h>
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#include <alpha/tc/tc.h>
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#include <alpha/tc/asic.h>
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#endif
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#ifdef pmax
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#include <pmax/pmax/pmaxtype.h>
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#include <pmax/pmax/machdep.h> /* XXX ioasic_init( */
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#include <pmax/pmax/asic.h>
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#include <pmax/pmax/kmin.h>
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#include <pmax/pmax/maxine.h>
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#include <pmax/pmax/kn03.h>
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#include <pmax/pmax/turbochannel.h> /* interrupt enable declaration */
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#include <pmax/pmax/kmin.h>
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#include <pmax/pmax/nameglue.h>
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/*
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* Which system models were configured?
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*/
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#include "opt_dec_3max.h"
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#include "opt_dec_3min.h"
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#include "opt_dec_3maxplus.h"
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#include "opt_dec_maxine.h"
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/* We support only one ioctl asic chip, and this is its address. */
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tc_addr_t ioasic_base = 0;
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/* tables of child devices on an ioasic bus. */
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#define C(x) ((void*)(x))
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#define ASIC_NDEVS(x) (sizeof(x)/sizeof(x[0]))
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#define ARRAY_SIZEOF(x) (sizeof((x)) / sizeof ((x)[0]))
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#if defined(DEC_3MAXPLUS) || defined(DEC_3MIN)
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struct ioasic_dev kn03_ioasic_devs[] = {
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{ "lance", 0x0C0000, C(KN03_LANCE_SLOT), IOASIC_INTR_LANCE },
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{ "scc", 0x100000, C(KN03_SCC0_SLOT), IOASIC_INTR_SCC_0 },
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{ "scc", 0x180000, C(KN03_SCC1_SLOT), IOASIC_INTR_SCC_1 },
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{ "mc146818", 0x200000, C(0), 0 },
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{ "asc", 0x300000, C(KN03_SCSI_SLOT), IOASIC_INTR_SCSI },
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};
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const int kn03_ioasic_ndevs = ARRAY_SIZEOF(kn03_ioasic_devs);
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#endif /* DEC_3MAXPLUS || DEC_3MIN */
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#if defined(DEC_MAXINE)
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struct ioasic_dev xine_ioasic_devs[] = {
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{ "lance", 0x0C0000, C(XINE_LANCE_SLOT), IOASIC_INTR_LANCE },
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{ "scc", 0x100000, C(XINE_SCC0_SLOT), IOASIC_INTR_SCC_0 },
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{ "mc146818", 0x200000, C(0), 0 },
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{ "isdn", 0x240000, C(XINE_ISDN_SLOT), XINE_INTR_ISDN },
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{ "dtop", 0x280000, C(XINE_DTOP_SLOT), XINE_INTR_DTOP },
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{ "fdc", 0x2C0000, C(XINE_FLOPPY_SLOT), 0 },
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{ "asc", 0x300000, C(XINE_SCSI_SLOT), IOASIC_INTR_SCSI },
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};
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const int xine_ioasic_ndevs = ARRAY_SIZEOF(xine_ioasic_devs);
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#endif /* DEC_MAXINE */
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#if defined(DEC_3MAX)
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struct ioasic_dev kn02_ioasic_devs[] = {
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{ "dc", 0x200000, C(7), 0 },
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{ "mc146818", 0x280000, C(0), 0 },
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};
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const int kn02_ioasic_ndevs = ARRAY_SIZEOF(kn02_ioasic_devs);
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#endif /* DEC_3MAX */
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#endif /* pmax */
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/* Definition of the driver for autoconfig. */
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int ioasicmatch __P((struct device *, struct cfdata *, void *));
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void ioasicattach __P((struct device *, struct device *, void *));
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/* Device locators. */
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#include "locators.h"
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#define ioasiccf_offset cf_loc[IOASICCF_OFFSET] /* offset */
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struct cfattach ioasic_ca = {
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sizeof(struct ioasic_softc), ioasicmatch, ioasicattach
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};
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#ifdef pmax
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struct ioasic_dev *ioasic_devs;
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#endif /*pmax*/
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int
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ioasicmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct tc_attach_args *ta = aux;
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/* An IOCTL asic can only occur on the turbochannel, anyway. */
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#ifdef notyet
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if (parent != &tccd)
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return (0);
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#endif
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/*
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* XXX This is wrong.
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* XXX this file will be re-implemented, anyway.
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*/
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/* The 3MAX (kn02) is special. */
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if (TC_BUS_MATCHNAME(ta, "KN02 ")) {
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#if 0
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printf("(configuring KN02 system slot as asic)\n");
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#endif
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goto gotasic;
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}
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/* Make sure that we're looking for this type of device. */
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if (!TC_BUS_MATCHNAME(ta, "IOCTL "))
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return (0);
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gotasic:
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if (cf->cf_unit > 0)
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return (0);
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return (1);
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}
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void
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ioasicattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct ioasic_softc *sc = (struct ioasic_softc *)self;
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struct tc_attach_args *ta = aux;
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int ndevs;
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/* See if the unit number is valid. */
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switch (systype) {
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#if defined(DEC_3MAXPLUS) || defined(DEC_3MIN)
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case DS_3MIN:
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case DS_3MAXPLUS:
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/* 3min ioasic addressees are the same as 3maxplus. */
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ioasic_devs = kn03_ioasic_devs;
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ndevs = kn03_ioasic_ndevs;
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break;
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#endif
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#ifdef DEC_MAXINE
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case DS_MAXINE:
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ioasic_devs = xine_ioasic_devs;
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ndevs = xine_ioasic_ndevs;
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break;
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#endif
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#ifdef DEC_3MAX
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case DS_3MAX:
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ioasic_devs = kn02_ioasic_devs;
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ndevs = kn02_ioasic_ndevs;
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break;
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#endif
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default:
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panic("ioasicattach: shouldn't be here, really...");
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}
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sc->sc_base = ta->ta_addr;
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ioasic_base = sc->sc_base; /* XXX XXX XXX */
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#ifdef pmax
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printf("\n");
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#else /* Alpha AXP: select ASIC speed */
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#ifdef DEC_3000_300
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if (systype == ST_DEC_3000_300) {
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*(volatile u_int *)IOASIC_REG_CSR(sc->sc_base) |=
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IOASIC_CSR_FASTMODE;
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MB();
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printf(": slow mode\n");
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} else
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#endif /*DEC_3000_300*/
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printf(": fast mode\n");
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/* Decstations use hand-craft code to enable asic interrupts */
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BUS_INTR_ESTABLISH(ta, asic_intr, sc);
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#endif /* Alpha AXP: select ASIC speed */
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/*
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* Try to configure each ioctl asic baseboard device.
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*/
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ioasic_attach_devs(sc, ioasic_devs, ndevs);
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}
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void
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ioasic_intr_establish(dev, cookie, level, handler, val)
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struct device *dev;
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void *cookie;
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tc_intrlevel_t level;
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intr_handler_t handler;
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void *val;
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{
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(*tc_enable_interrupt)((int)cookie, handler, val, 1);
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}
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/* XXX */
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char *
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ioasic_lance_ether_address()
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{
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return (u_char *)IOASIC_SYS_ETHER_ADDRESS(ioasic_base);
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}
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void
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ioasic_lance_dma_setup(v)
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void *v;
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{
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volatile u_int32_t *ldp;
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tc_addr_t tca;
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tca = (tc_addr_t)v;
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ldp = (volatile u_int *)IOASIC_REG_LANCE_DMAPTR(ioasic_base);
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*ldp = ((tca << 3) & ~(tc_addr_t)0x1f) | ((tca >> 29) & 0x1f);
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tc_wmb();
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*(volatile u_int32_t *)IOASIC_REG_CSR(ioasic_base) |=
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IOASIC_CSR_DMAEN_LANCE;
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tc_mb();
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}
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void ioasic_init(int flag);
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/*
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* Initialize the I/O asic
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*/
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void
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ioasic_init(bogus)
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int bogus; /* XXX */
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{
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/* common across 3min, 3maxplus and maxine */
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*(volatile u_int *)(ioasic_base + IOASIC_LANCE_DECODE) = 0x3;
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*(volatile u_int *)(ioasic_base + IOASIC_SCSI_DECODE) = 0xe;
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#if 0
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switch (systype) {
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case DS_3MIN:
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case DS_3MAXPLUS:
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*(volatile u_int *)(ioasic_base + IOASIC_SCC0_DECODE) = (0x10|4);
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*(volatile u_int *)(ioasic_base + IOASIC_SCC1_DECODE) = (0x10|6);
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*(volatile u_int *)(ioasic_base + IOASIC_CSR) = 0x00000f00;
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break;
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case DS_MAXINE:
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*(volatile u_int *)(ioasic_base + IOASIC_SCC0_DECODE) = (0x10|4);
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*(volatile u_int *)(ioasic_base + IOASIC_DTOP_DECODE) = 10;
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*(volatile u_int *)(ioasic_base + IOASIC_FLOPPY_DECODE) = 13;
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*(volatile u_int *)(ioasic_base + IOASIC_CSR) = 0x00001fc1;
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break;
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}
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#endif
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}
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