337 lines
8.9 KiB
C
337 lines
8.9 KiB
C
/* $NetBSD: wdsc.c,v 1.19 2000/08/12 20:09:12 scw Exp $ */
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/*
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* Copyright (c) 1996 Steve Woodford
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* Copyright (c) 1982, 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)wdsc.c
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <mvme68k/dev/dmavar.h>
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#include <mvme68k/dev/pccreg.h>
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#include <mvme68k/dev/pccvar.h>
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#include <mvme68k/dev/sbicreg.h>
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#include <mvme68k/dev/sbicvar.h>
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#include <mvme68k/dev/wdscreg.h>
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void wdsc_pcc_attach __P((struct device *, struct device *, void *));
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int wdsc_pcc_match __P((struct device *, struct cfdata *, void *));
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struct cfattach wdsc_pcc_ca = {
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sizeof(struct sbic_softc), wdsc_pcc_match, wdsc_pcc_attach
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};
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extern struct cfdriver wdsc_cd;
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void wdsc_enintr __P((struct sbic_softc *));
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int wdsc_dmago __P((struct sbic_softc *, char *, int, int));
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int wdsc_dmanext __P((struct sbic_softc *));
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void wdsc_dmastop __P((struct sbic_softc *));
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int wdsc_dmaintr __P((void *));
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int wdsc_scsiintr __P((void *));
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struct scsipi_device wdsc_scsidev = {
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NULL, /* use default error handler */
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NULL, /* do not have a start functio */
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NULL, /* have no async handler */
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NULL, /* Use default done routine */
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};
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/*
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* Match for SCSI devices on the onboard WD33C93 chip
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*/
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int
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wdsc_pcc_match(pdp, cf, auxp)
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struct device *pdp;
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struct cfdata *cf;
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void *auxp;
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{
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struct pcc_attach_args *pa = auxp;
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if (strcmp(pa->pa_name, wdsc_cd.cd_name))
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return (0);
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pa->pa_ipl = cf->pcccf_ipl;
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return (1);
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}
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/*
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* Attach the wdsc driver
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*/
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void
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wdsc_pcc_attach(pdp, dp, auxp)
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struct device *pdp, *dp;
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void *auxp;
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{
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struct sbic_softc *sc;
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struct pcc_attach_args *pa;
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bus_space_handle_t bush;
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sc = (struct sbic_softc *)dp;
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pa = auxp;
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bus_space_map(pa->pa_bust, pa->pa_offset, 0x20, 0, &bush);
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/*
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* XXXSCW: We *need* an MI, bus_spaced WD33C93 driver...
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*/
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sc->sc_sbicp = (sbic_regmap_p) bush;
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sc->sc_enintr = wdsc_enintr;
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sc->sc_dmago = wdsc_dmago;
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sc->sc_dmanext = wdsc_dmanext;
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sc->sc_dmastop = wdsc_dmastop;
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sc->sc_dmacmd = 0;
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sc->sc_adapter.scsipi_cmd = sbic_scsicmd;
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sc->sc_adapter.scsipi_minphys = sbic_minphys;
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sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
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sc->sc_link.adapter_softc = sc;
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sc->sc_link.scsipi_scsi.adapter_target = 7;
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sc->sc_link.adapter = &sc->sc_adapter;
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sc->sc_link.device = &wdsc_scsidev;
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sc->sc_link.openings = 2;
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sc->sc_link.scsipi_scsi.max_target = 7;
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sc->sc_link.scsipi_scsi.max_lun = 7;
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sc->sc_link.type = BUS_SCSI;
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printf(": WD33C93 SCSI, target %d\n",
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sc->sc_link.scsipi_scsi.adapter_target);
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/*
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* Eveything is a valid dma address.
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*/
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sc->sc_dmamask = 0;
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/*
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* The onboard WD33C93 of the '147 is usually clocked at 10MHz...
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* (We use 10 times this for accuracy in later calculations)
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*/
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sc->sc_clkfreq = 100;
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/*
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* Initialise the hardware
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*/
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sbicinit(sc);
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/*
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* Fix up the interrupts
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*/
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sc->sc_ipl = pa->pa_ipl & PCC_IMASK;
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pcc_reg_write(sys_pcc, PCCREG_SCSI_INTR_CTRL, PCC_ICLEAR);
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pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL, PCC_ICLEAR);
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pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0);
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pccintr_establish(PCCV_DMA, wdsc_dmaintr, sc->sc_ipl, sc);
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pccintr_establish(PCCV_SCSI, wdsc_scsiintr, sc->sc_ipl, sc);
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pcc_reg_write(sys_pcc, PCCREG_SCSI_INTR_CTRL,
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sc->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
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(void)config_found(dp, &sc->sc_link, scsiprint);
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}
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/*
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* Enable DMA interrupts
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*/
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void
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wdsc_enintr(dev)
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struct sbic_softc *dev;
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{
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dev->sc_flags |= SBICF_INTR;
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pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL,
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dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
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}
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/*
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* Prime the hardware for a DMA transfer
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*/
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int
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wdsc_dmago(dev, addr, count, flags)
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struct sbic_softc *dev;
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char *addr;
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int count, flags;
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{
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/*
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* Set up the command word based on flags
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*/
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if ( (flags & DMAGO_READ) == 0 )
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dev->sc_dmacmd = DMAC_CSR_ENABLE | DMAC_CSR_WRITE;
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else
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dev->sc_dmacmd = DMAC_CSR_ENABLE;
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dev->sc_flags |= SBICF_INTR;
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dev->sc_tcnt = dev->sc_cur->dc_count << 1;
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/*
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* Prime the hardware.
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* Note, it's probably not necessary to do this here, since dmanext
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* is called just prior to the actual transfer.
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*/
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pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0);
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pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL,
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dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
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pcc_reg_write32(sys_pcc, PCCREG_DMA_DATA_ADDR,
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(u_int32_t) dev->sc_cur->dc_addr);
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pcc_reg_write32(sys_pcc, PCCREG_DMA_BYTE_COUNT,
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(u_int32_t) dev->sc_tcnt | (1 << 24));
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pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, dev->sc_dmacmd);
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return(dev->sc_tcnt);
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}
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/*
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* Prime the hardware for the next DMA transfer
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*/
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int
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wdsc_dmanext(dev)
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struct sbic_softc *dev;
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{
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if ( dev->sc_cur > dev->sc_last ) {
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/*
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* Shouldn't happen !!
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*/
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printf("wdsc_dmanext at end !!!\n");
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wdsc_dmastop(dev);
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return(0);
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}
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dev->sc_tcnt = dev->sc_cur->dc_count << 1;
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/*
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* Load the next DMA address
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*/
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pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0);
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pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL,
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dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
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pcc_reg_write32(sys_pcc, PCCREG_DMA_DATA_ADDR,
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(u_int32_t) dev->sc_cur->dc_addr);
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pcc_reg_write32(sys_pcc, PCCREG_DMA_BYTE_COUNT,
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(u_int32_t) dev->sc_tcnt | (1 << 24));
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pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, dev->sc_dmacmd);
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return(dev->sc_tcnt);
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}
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/*
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* Stop DMA, and disable interrupts
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*/
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void
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wdsc_dmastop(dev)
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struct sbic_softc *dev;
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{
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int s;
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s = splbio();
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pcc_reg_write(sys_pcc, PCCREG_DMA_CONTROL, 0);
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pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL, dev->sc_ipl | PCC_ICLEAR);
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splx(s);
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}
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/*
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* Come here following a DMA interrupt
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*/
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int
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wdsc_dmaintr(arg)
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void *arg;
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{
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struct sbic_softc *dev = arg;
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int found = 0;
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/*
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* Really a DMA interrupt?
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*/
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if ( (pcc_reg_read(sys_pcc, PCCREG_DMA_INTR_CTRL) & 0x80) == 0 )
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return(0);
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/*
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* Was it a completion interrupt?
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* XXXSCW Note: Support for other DMA interrupts is required, eg. buserr
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*/
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if ( pcc_reg_read(sys_pcc, PCCREG_DMA_CONTROL) & DMAC_CSR_DONE ) {
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++found;
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pcc_reg_write(sys_pcc, PCCREG_DMA_INTR_CTRL,
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dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
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}
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return(found);
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}
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/*
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* Come here for SCSI interrupts
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*/
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int
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wdsc_scsiintr(arg)
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void *arg;
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{
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struct sbic_softc *dev = arg;
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int found;
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/*
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* Really a SCSI interrupt?
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*/
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if ( (pcc_reg_read(sys_pcc, PCCREG_SCSI_INTR_CTRL) & 0x80) == 0 )
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return(0);
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/*
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* Go handle it
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*/
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found = sbicintr(dev);
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/*
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* Acknowledge and clear the interrupt
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*/
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pcc_reg_write(sys_pcc, PCCREG_SCSI_INTR_CTRL,
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dev->sc_ipl | PCC_IENABLE | PCC_ICLEAR);
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return(found);
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}
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