137 lines
5.2 KiB
C
137 lines
5.2 KiB
C
/* $NetBSD: btreg.h,v 1.3 2005/12/11 12:23:56 christos Exp $ */
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/*
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* Copyright (c) 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)btreg.h 8.2 (Berkeley) 1/21/94
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*/
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/*
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* Several Sun color frame buffers use some kind of Brooktree video
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* DAC (e.g., the Bt458, -- in any case, Brooktree make the only
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* decent color frame buffer chips).
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*
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* Color map control on these is a bit funky in a SPARCstation.
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* To update the color map one would normally do byte writes, but
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* the hardware takes longword writes. Since there are three
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* registers for each color map entry (R, then G, then B), we have
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* to set color 1 with a write to address 0 (setting 0's R/G/B and
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* color 1's R) followed by a second write to address 1 (setting
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* color 1's G/B and color 2's R/G). Software must therefore keep
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* a copy of the current map.
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*
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* The colormap address register increments automatically, so the
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* above write is done as:
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*
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* bt->bt_addr = 0;
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* bt->bt_cmap = R0G0B0R1;
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* bt->bt_cmap = G1B1R2G2;
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* ...
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*
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* Yow!
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*
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* Bonus complication: on the cg6, only the top 8 bits of each 32 bit
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* register matter, even though the cg3 takes all the bits from all
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* bytes written to it.
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*/
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struct bt_regs {
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u_int bt_addr; /* map address register */
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u_int bt_cmap; /* colormap data register */
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u_int bt_ctrl; /* control register */
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u_int bt_omap; /* overlay (cursor) map register */
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};
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#define BT_INIT(bt, shift) do { /* whatever this means.. */ \
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(bt)->bt_addr = 0x06 << (shift); /* command reg */ \
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(bt)->bt_ctrl = 0x73 << (shift); /* overlay plane */ \
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(bt)->bt_addr = 0x04 << (shift); /* read mask */ \
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(bt)->bt_ctrl = 0xff << (shift); /* color planes */ \
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} while(0)
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#define BT_UNBLANK(bt, x, shift) do { \
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/* restore color 0 (and R of color 1) */ \
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(bt)->bt_addr = 0 << (shift); \
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(bt)->bt_cmap = (x); \
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if ((shift)) { \
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(bt)->bt_cmap = (x) << 8; \
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(bt)->bt_cmap = (x) << 16; \
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/* restore read mask */ \
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BT_INIT((bt), (shift)); \
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} while(0)
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#define BT_BLANK(bt, shift) do { \
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(bt)->bt_addr = 0x06 << (shift); /* command reg */ \
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(bt)->bt_ctrl = 0x70 << (shift); /* overlay plane */ \
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(bt)->bt_addr = 0x04 << (shift); /* read mask */ \
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(bt)->bt_ctrl = 0x00 << (shift); /* color planes */ \
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/* Set color 0 to black -- note that this overwrites R of color 1. */\
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(bt)->bt_addr = 0 << (shift); \
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(bt)->bt_cmap = 0 << (shift); \
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/* restore read mask */ \
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BT_INIT((bt), (shift)); \
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} while(0)
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/*
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* Sbus framebuffer control look like this (usually at offset 0x400000).
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*/
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struct fbcontrol {
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struct bt_regs fbc_dac;
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u_char fbc_ctrl;
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u_char fbc_status;
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u_char fbc_cursor_start;
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u_char fbc_cursor_end;
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u_char fbc_vcontrol[12]; /* 12 bytes of video timing goo */
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};
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/* fbc_ctrl bits: */
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#define FBC_IENAB 0x80 /* Interrupt enable */
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#define FBC_VENAB 0x40 /* Video enable */
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#define FBC_TIMING 0x20 /* Master timing enable */
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#define FBC_CURSOR 0x10 /* Cursor compare enable */
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#define FBC_XTALMSK 0x0c /* Xtal select (0,1,2,test) */
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#define FBC_DIVMSK 0x03 /* Divisor (1,2,3,4) */
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/* fbc_status bits: */
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#define FBS_INTR 0x80 /* Interrupt pending */
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#define FBS_MSENSE 0x70 /* Monitor sense mask */
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#define FBS_1024X768 0x10
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#define FBS_1152X900 0x30
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#define FBS_1280X1024 0x40
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#define FBS_1600X1280 0x50
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#define FBS_ID_MASK 0x0f /* ID mask */
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#define FBS_ID_COLOR 0x01
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#define FBS_ID_MONO 0x02
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#define FBS_ID_MONO_ECL 0x03 /* ? */
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