112 lines
3.3 KiB
C
112 lines
3.3 KiB
C
/* $NetBSD: mmc_pwrseq_emmc.c,v 1.2 2021/01/27 03:10:21 thorpej Exp $ */
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/*-
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* Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: mmc_pwrseq_emmc.c,v 1.2 2021/01/27 03:10:21 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/gpio.h>
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#include <dev/fdt/fdtvar.h>
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#define MMCPWRSEQ_MAX_PINS 32
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static const struct device_compatible_entry compat_data[] = {
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{ .compat = "mmc-pwrseq-emmc" },
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DEVICE_COMPAT_EOL
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};
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struct mmcpwrseq_emmc_softc {
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device_t sc_dev;
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int sc_phandle;
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struct fdtbus_gpio_pin *sc_pin;
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};
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static void
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mmcpwrseq_emmc_reset(device_t dev)
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{
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struct mmcpwrseq_emmc_softc * const sc = device_private(dev);
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fdtbus_gpio_write(sc->sc_pin, 1);
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delay(1);
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fdtbus_gpio_write(sc->sc_pin, 0);
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delay(200);
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}
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static const struct fdtbus_mmc_pwrseq_func mmcpwrseq_emmc_funcs = {
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.reset = mmcpwrseq_emmc_reset,
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};
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static int
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mmcpwrseq_emmc_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct fdt_attach_args * const faa = aux;
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return of_compatible_match(faa->faa_phandle, compat_data);
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}
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static void
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mmcpwrseq_emmc_attach(device_t parent, device_t self, void *aux)
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{
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struct mmcpwrseq_emmc_softc * const sc = device_private(self);
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struct fdt_attach_args * const faa = aux;
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const int phandle = faa->faa_phandle;
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sc->sc_dev = self;
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sc->sc_phandle = phandle;
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sc->sc_pin = fdtbus_gpio_acquire_index(phandle, "reset-gpios", 0, GPIO_PIN_OUTPUT);
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if (sc->sc_pin == NULL) {
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aprint_error(": couldn't get reset GPIO\n");
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return;
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}
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aprint_naive("\n");
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aprint_normal(": eMMC hardware reset provider\n");
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fdtbus_register_mmc_pwrseq(self, phandle, &mmcpwrseq_emmc_funcs);
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}
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static int
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mmcpwrseq_emmc_detach(device_t self, int flags)
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{
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struct mmcpwrseq_emmc_softc * const sc = device_private(self);
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if (sc->sc_pin != NULL)
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mmcpwrseq_emmc_reset(self);
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return 0;
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}
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CFATTACH_DECL_NEW(mmcpwrseq_emmc, sizeof(struct mmcpwrseq_emmc_softc),
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mmcpwrseq_emmc_match, mmcpwrseq_emmc_attach, mmcpwrseq_emmc_detach, NULL);
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