575 lines
14 KiB
C
575 lines
14 KiB
C
/* $NetBSD: cpufreq_dt.c,v 1.19 2021/02/22 06:21:35 ryo Exp $ */
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/*-
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* Copyright (c) 2015-2017 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpufreq_dt.c,v 1.19 2021/02/22 06:21:35 ryo Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kmem.h>
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#include <sys/bus.h>
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#include <sys/atomic.h>
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#include <sys/xcall.h>
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#include <sys/sysctl.h>
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#include <sys/queue.h>
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#include <sys/once.h>
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#include <sys/cpu.h>
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#include <dev/fdt/fdtvar.h>
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struct cpufreq_dt_table {
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int phandle;
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TAILQ_ENTRY(cpufreq_dt_table) next;
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};
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static TAILQ_HEAD(, cpufreq_dt_table) cpufreq_dt_tables =
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TAILQ_HEAD_INITIALIZER(cpufreq_dt_tables);
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static kmutex_t cpufreq_dt_tables_lock;
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struct cpufreq_dt_opp {
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u_int freq_khz;
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u_int voltage_uv;
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u_int latency_ns;
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};
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struct cpufreq_dt_softc {
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device_t sc_dev;
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int sc_phandle;
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struct clk *sc_clk;
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struct fdtbus_regulator *sc_supply;
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struct cpufreq_dt_opp *sc_opp;
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ssize_t sc_nopp;
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u_int sc_freq_target;
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bool sc_freq_throttle;
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u_int sc_busy;
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char *sc_freq_available;
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int sc_node_target;
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int sc_node_current;
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int sc_node_available;
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struct cpufreq_dt_table sc_table;
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};
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static void
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cpufreq_dt_change_cb(void *arg1, void *arg2)
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{
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struct cpufreq_dt_softc * const sc = arg1;
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struct cpu_info *ci = curcpu();
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ci->ci_data.cpu_cc_freq = clk_get_rate(sc->sc_clk);
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}
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static int
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cpufreq_dt_set_rate(struct cpufreq_dt_softc *sc, u_int freq_khz)
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{
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struct cpufreq_dt_opp *opp = NULL;
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u_int old_rate, new_rate, old_uv, new_uv;
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uint64_t xc;
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int error;
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ssize_t n;
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for (n = 0; n < sc->sc_nopp; n++)
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if (sc->sc_opp[n].freq_khz == freq_khz) {
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opp = &sc->sc_opp[n];
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break;
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}
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if (opp == NULL)
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return EINVAL;
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old_rate = clk_get_rate(sc->sc_clk);
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new_rate = freq_khz * 1000;
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new_uv = opp->voltage_uv;
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if (old_rate == new_rate)
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return 0;
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if (sc->sc_supply != NULL) {
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error = fdtbus_regulator_get_voltage(sc->sc_supply, &old_uv);
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if (error != 0)
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return error;
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if (new_uv > old_uv) {
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error = fdtbus_regulator_set_voltage(sc->sc_supply,
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new_uv, new_uv);
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if (error != 0)
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return error;
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}
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}
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error = clk_set_rate(sc->sc_clk, new_rate);
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if (error != 0)
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return error;
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const u_int latency_us = howmany(opp->latency_ns, 1000);
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if (latency_us > 0)
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delay(latency_us);
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if (sc->sc_supply != NULL) {
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if (new_uv < old_uv) {
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error = fdtbus_regulator_set_voltage(sc->sc_supply,
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new_uv, new_uv);
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if (error != 0)
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return error;
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}
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}
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if (error == 0) {
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xc = xc_broadcast(0, cpufreq_dt_change_cb, sc, NULL);
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xc_wait(xc);
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pmf_event_inject(NULL, PMFE_SPEED_CHANGED);
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}
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return 0;
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}
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static void
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cpufreq_dt_throttle_enable(device_t dev)
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{
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struct cpufreq_dt_softc * const sc = device_private(dev);
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if (sc->sc_freq_throttle)
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return;
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const u_int freq_khz = sc->sc_opp[sc->sc_nopp - 1].freq_khz;
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while (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0)
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kpause("throttle", false, 1, NULL);
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if (cpufreq_dt_set_rate(sc, freq_khz) == 0) {
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aprint_debug_dev(sc->sc_dev, "throttle enabled (%u.%03u MHz)\n",
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freq_khz / 1000, freq_khz % 1000);
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sc->sc_freq_throttle = true;
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if (sc->sc_freq_target == 0)
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sc->sc_freq_target = clk_get_rate(sc->sc_clk) / 1000000;
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}
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atomic_dec_uint(&sc->sc_busy);
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}
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static void
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cpufreq_dt_throttle_disable(device_t dev)
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{
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struct cpufreq_dt_softc * const sc = device_private(dev);
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if (!sc->sc_freq_throttle)
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return;
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while (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0)
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kpause("throttle", false, 1, NULL);
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const u_int freq_khz = sc->sc_freq_target * 1000;
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if (cpufreq_dt_set_rate(sc, freq_khz) == 0) {
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aprint_debug_dev(sc->sc_dev, "throttle disabled (%u.%03u MHz)\n",
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freq_khz / 1000, freq_khz % 1000);
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sc->sc_freq_throttle = false;
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}
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atomic_dec_uint(&sc->sc_busy);
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}
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static int
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cpufreq_dt_sysctl_helper(SYSCTLFN_ARGS)
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{
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struct cpufreq_dt_softc * const sc = rnode->sysctl_data;
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struct sysctlnode node;
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u_int fq, oldfq = 0;
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int error, n;
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node = *rnode;
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node.sysctl_data = &fq;
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if (rnode->sysctl_num == sc->sc_node_target) {
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if (sc->sc_freq_target == 0)
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sc->sc_freq_target = clk_get_rate(sc->sc_clk) / 1000000;
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fq = sc->sc_freq_target;
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} else
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fq = clk_get_rate(sc->sc_clk) / 1000000;
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if (rnode->sysctl_num == sc->sc_node_target)
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oldfq = fq;
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if (sc->sc_freq_target == 0)
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sc->sc_freq_target = fq;
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error = sysctl_lookup(SYSCTLFN_CALL(&node));
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if (error || newp == NULL)
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return error;
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if (fq == oldfq || rnode->sysctl_num != sc->sc_node_target)
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return 0;
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for (n = 0; n < sc->sc_nopp; n++)
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if (sc->sc_opp[n].freq_khz / 1000 == fq)
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break;
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if (n == sc->sc_nopp)
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return EINVAL;
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if (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0)
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return EBUSY;
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sc->sc_freq_target = fq;
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if (sc->sc_freq_throttle)
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error = 0;
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else
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error = cpufreq_dt_set_rate(sc, fq * 1000);
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atomic_dec_uint(&sc->sc_busy);
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return error;
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}
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static struct cpu_info *
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cpufreq_dt_cpu_lookup(cpuid_t mpidr)
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{
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CPU_INFO_ITERATOR cii;
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struct cpu_info *ci;
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for (CPU_INFO_FOREACH(cii, ci)) {
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if (ci->ci_cpuid == mpidr)
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return ci;
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}
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return NULL;
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}
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static void
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cpufreq_dt_init_sysctl(struct cpufreq_dt_softc *sc)
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{
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const struct sysctlnode *node, *cpunode;
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struct sysctllog *cpufreq_log = NULL;
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struct cpu_info *ci;
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bus_addr_t mpidr;
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int error, i;
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if (fdtbus_get_reg(sc->sc_phandle, 0, &mpidr, 0) != 0)
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return;
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ci = cpufreq_dt_cpu_lookup(mpidr);
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if (ci == NULL)
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return;
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sc->sc_freq_available = kmem_zalloc(strlen("XXXX ") * sc->sc_nopp, KM_SLEEP);
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for (i = 0; i < sc->sc_nopp; i++) {
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char buf[6];
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snprintf(buf, sizeof(buf), i ? " %u" : "%u", sc->sc_opp[i].freq_khz / 1000);
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strcat(sc->sc_freq_available, buf);
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}
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error = sysctl_createv(&cpufreq_log, 0, NULL, &node,
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CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL,
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NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL);
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if (error)
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goto sysctl_failed;
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error = sysctl_createv(&cpufreq_log, 0, &node, &node,
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0, CTLTYPE_NODE, "cpufreq", NULL,
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NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL);
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if (error)
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goto sysctl_failed;
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error = sysctl_createv(&cpufreq_log, 0, &node, &cpunode,
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0, CTLTYPE_NODE, cpu_name(ci), NULL,
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NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL);
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if (error)
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goto sysctl_failed;
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error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node,
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CTLFLAG_READWRITE, CTLTYPE_INT, "target", NULL,
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cpufreq_dt_sysctl_helper, 0, (void *)sc, 0,
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CTL_CREATE, CTL_EOL);
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if (error)
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goto sysctl_failed;
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sc->sc_node_target = node->sysctl_num;
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error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node,
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CTLFLAG_READWRITE, CTLTYPE_INT, "current", NULL,
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cpufreq_dt_sysctl_helper, 0, (void *)sc, 0,
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CTL_CREATE, CTL_EOL);
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if (error)
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goto sysctl_failed;
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sc->sc_node_current = node->sysctl_num;
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error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node,
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0, CTLTYPE_STRING, "available", NULL,
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NULL, 0, sc->sc_freq_available, 0,
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CTL_CREATE, CTL_EOL);
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if (error)
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goto sysctl_failed;
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sc->sc_node_available = node->sysctl_num;
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return;
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sysctl_failed:
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aprint_error_dev(sc->sc_dev, "couldn't create sysctl nodes: %d\n", error);
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sysctl_teardown(&cpufreq_log);
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}
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static int
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cpufreq_dt_parse_opp(struct cpufreq_dt_softc *sc)
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{
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const int phandle = sc->sc_phandle;
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const u_int *opp;
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int len, i;
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opp = fdtbus_get_prop(phandle, "operating-points", &len);
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if (len < 8)
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return ENXIO;
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sc->sc_nopp = len / 8;
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sc->sc_opp = kmem_zalloc(sizeof(*sc->sc_opp) * sc->sc_nopp, KM_SLEEP);
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for (i = 0; i < sc->sc_nopp; i++, opp += 2) {
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sc->sc_opp[i].freq_khz = be32toh(opp[0]);
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sc->sc_opp[i].voltage_uv = be32toh(opp[1]);
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}
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return 0;
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}
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static const struct fdt_opp_info *
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cpufreq_dt_lookup_opp_info(const int opp_table)
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{
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__link_set_decl(fdt_opps, struct fdt_opp_info);
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struct fdt_opp_info * const *opp;
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const struct fdt_opp_info *best_opp = NULL;
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int match, best_match = 0;
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__link_set_foreach(opp, fdt_opps) {
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const struct device_compatible_entry compat_data[] = {
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{ .compat = (*opp)->opp_compat },
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DEVICE_COMPAT_EOL
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};
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match = of_compatible_match(opp_table, compat_data);
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if (match > best_match) {
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best_match = match;
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best_opp = *opp;
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}
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}
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return best_opp;
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}
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static bool
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cpufreq_dt_opp_v2_supported(const int opp_table, const int opp_node)
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{
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return true;
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}
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FDT_OPP(opp_v2, "operating-points-v2", cpufreq_dt_opp_v2_supported);
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static bool
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cpufreq_dt_node_supported(const struct fdt_opp_info *opp_info, const int opp_table, const int opp_node)
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{
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if (!fdtbus_status_okay(opp_node))
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return false;
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if (of_hasprop(opp_node, "opp-suspend"))
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return false;
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if (opp_info != NULL)
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return opp_info->opp_supported(opp_table, opp_node);
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return false;
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}
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static int
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cpufreq_dt_parse_opp_v2(struct cpufreq_dt_softc *sc)
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{
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const int phandle = sc->sc_phandle;
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struct cpufreq_dt_table *table;
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const struct fdt_opp_info *opp_info;
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const u_int *opp_uv;
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uint64_t opp_hz;
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int opp_node, len, i, index;
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const int opp_table = fdtbus_get_phandle(phandle, "operating-points-v2");
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if (opp_table < 0)
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return ENOENT;
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/* If the table is shared, only setup a single instance */
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if (of_hasprop(opp_table, "opp-shared")) {
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TAILQ_FOREACH(table, &cpufreq_dt_tables, next)
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if (table->phandle == opp_table)
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return EEXIST;
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sc->sc_table.phandle = opp_table;
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TAILQ_INSERT_TAIL(&cpufreq_dt_tables, &sc->sc_table, next);
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}
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opp_info = cpufreq_dt_lookup_opp_info(opp_table);
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for (opp_node = OF_child(opp_table); opp_node; opp_node = OF_peer(opp_node)) {
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if (!cpufreq_dt_node_supported(opp_info, opp_table, opp_node))
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continue;
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sc->sc_nopp++;
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}
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if (sc->sc_nopp == 0)
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return EINVAL;
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sc->sc_opp = kmem_zalloc(sizeof(*sc->sc_opp) * sc->sc_nopp, KM_SLEEP);
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index = sc->sc_nopp - 1;
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for (opp_node = OF_child(opp_table), i = 0; opp_node; opp_node = OF_peer(opp_node), i++) {
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if (!cpufreq_dt_node_supported(opp_info, opp_table, opp_node))
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continue;
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if (of_getprop_uint64(opp_node, "opp-hz", &opp_hz) != 0)
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return EINVAL;
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opp_uv = fdtbus_get_prop(opp_node, "opp-microvolt", &len);
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if (opp_uv == NULL || len < 1)
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return EINVAL;
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/* Table is in reverse order */
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sc->sc_opp[index].freq_khz = (u_int)(opp_hz / 1000);
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sc->sc_opp[index].voltage_uv = be32toh(opp_uv[0]);
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of_getprop_uint32(opp_node, "clock-latency-ns", &sc->sc_opp[index].latency_ns);
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--index;
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}
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return 0;
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}
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static int
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cpufreq_dt_parse(struct cpufreq_dt_softc *sc)
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{
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const int phandle = sc->sc_phandle;
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int error, i;
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if (of_hasprop(phandle, "cpu-supply")) {
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sc->sc_supply = fdtbus_regulator_acquire(phandle, "cpu-supply");
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if (sc->sc_supply == NULL) {
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aprint_error_dev(sc->sc_dev,
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"couldn't acquire cpu-supply\n");
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return ENXIO;
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}
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}
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sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
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if (sc->sc_clk == NULL) {
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aprint_error_dev(sc->sc_dev, "couldn't acquire clock\n");
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return ENXIO;
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}
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mutex_enter(&cpufreq_dt_tables_lock);
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if (of_hasprop(phandle, "operating-points"))
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error = cpufreq_dt_parse_opp(sc);
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else if (of_hasprop(phandle, "operating-points-v2"))
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error = cpufreq_dt_parse_opp_v2(sc);
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else
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error = EINVAL;
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mutex_exit(&cpufreq_dt_tables_lock);
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|
|
|
if (error) {
|
|
if (error != EEXIST)
|
|
aprint_error_dev(sc->sc_dev,
|
|
"couldn't parse operating points: %d\n", error);
|
|
return error;
|
|
}
|
|
|
|
for (i = 0; i < sc->sc_nopp; i++) {
|
|
aprint_debug_dev(sc->sc_dev, "supported rate: %u.%03u MHz, %u uV\n",
|
|
sc->sc_opp[i].freq_khz / 1000,
|
|
sc->sc_opp[i].freq_khz % 1000,
|
|
sc->sc_opp[i].voltage_uv);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
cpufreq_dt_match(device_t parent, cfdata_t cf, void *aux)
|
|
{
|
|
struct fdt_attach_args * const faa = aux;
|
|
const int phandle = faa->faa_phandle;
|
|
bus_addr_t addr;
|
|
|
|
if (fdtbus_get_reg(phandle, 0, &addr, NULL) != 0)
|
|
return 0;
|
|
|
|
if (!of_hasprop(phandle, "clocks"))
|
|
return 0;
|
|
|
|
if (!of_hasprop(phandle, "operating-points") &&
|
|
!of_hasprop(phandle, "operating-points-v2"))
|
|
return 0;
|
|
|
|
return 1;
|
|
}
|
|
|
|
static void
|
|
cpufreq_dt_init(device_t self)
|
|
{
|
|
struct cpufreq_dt_softc * const sc = device_private(self);
|
|
int error;
|
|
|
|
if ((error = cpufreq_dt_parse(sc)) != 0)
|
|
return;
|
|
|
|
pmf_event_register(sc->sc_dev, PMFE_THROTTLE_ENABLE, cpufreq_dt_throttle_enable, true);
|
|
pmf_event_register(sc->sc_dev, PMFE_THROTTLE_DISABLE, cpufreq_dt_throttle_disable, true);
|
|
|
|
cpufreq_dt_init_sysctl(sc);
|
|
|
|
if (sc->sc_nopp > 0) {
|
|
struct cpufreq_dt_opp * const opp = &sc->sc_opp[0];
|
|
|
|
aprint_normal_dev(sc->sc_dev, "rate: %u.%03u MHz, %u uV\n",
|
|
opp->freq_khz / 1000, opp->freq_khz % 1000, opp->voltage_uv);
|
|
cpufreq_dt_set_rate(sc, opp->freq_khz);
|
|
}
|
|
}
|
|
|
|
static int
|
|
cpufreq_dt_lock_init(void)
|
|
{
|
|
mutex_init(&cpufreq_dt_tables_lock, MUTEX_DEFAULT, IPL_NONE);
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
cpufreq_dt_attach(device_t parent, device_t self, void *aux)
|
|
{
|
|
static ONCE_DECL(locks);
|
|
struct cpufreq_dt_softc * const sc = device_private(self);
|
|
struct fdt_attach_args * const faa = aux;
|
|
|
|
RUN_ONCE(&locks, cpufreq_dt_lock_init);
|
|
|
|
sc->sc_dev = self;
|
|
sc->sc_phandle = faa->faa_phandle;
|
|
|
|
aprint_naive("\n");
|
|
aprint_normal("\n");
|
|
|
|
config_interrupts(self, cpufreq_dt_init);
|
|
}
|
|
|
|
CFATTACH_DECL_NEW(cpufreq_dt, sizeof(struct cpufreq_dt_softc),
|
|
cpufreq_dt_match, cpufreq_dt_attach, NULL, NULL);
|