99 lines
3.9 KiB
C
99 lines
3.9 KiB
C
/* $NetBSD: sa11x0_gpioreg.h,v 1.11 2001/07/13 03:33:38 ichiro Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Ichiro FUKUHARA (ichiro@ichiro.org).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* SA-11x0 GPIO Register
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*/
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#define SAGPIO_NPORTS 8
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/* GPIO pin-level register */
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#define SAGPIO_PLR 0x00
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/* GPIO pin direction register */
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#define SAGPIO_PDR 0x04
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/* GPIO pin output set register */
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#define SAGPIO_PSR 0x08
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/* GPIO pin output clear register */
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#define SAGPIO_PCR 0x0C
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/* GPIO rising-edge detect register */
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#define SAGPIO_RER 0x10
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/* GPIO falling-edge detect register */
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#define SAGPIO_FER 0x14
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/* GPIO edge-detect status register */
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#define SAGPIO_EDR 0x18
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/* GPIO alternate function register */
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#define SAGPIO_AFR 0x1C
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/* XXX */
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#define GPIO(x) (0x00000001 << (x))
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/*
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* SA-11x0 GPIOs parameter
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* Alternate Functions
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*/
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#define GPIO_ALT_LDD8 GPIO(2) /* LCD DATA(8) */
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#define GPIO_ALT_LDD9 GPIO(3) /* LCD DATA(9) */
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#define GPIO_ALT_LDD10 GPIO(4) /* LCD DATA(10) */
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#define GPIO_ALT_LDD11 GPIO(5) /* LCD DATA(11) */
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#define GPIO_ALT_LDD12 GPIO(6) /* LCD DATA(12) */
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#define GPIO_ALT_LDD13 GPIO(7) /* LCD DATA(13) */
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#define GPIO_ALT_LDD14 GPIO(8) /* LCD DATA(14) */
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#define GPIO_ALT_LDD15 GPIO(9) /* LCD DATA(15) */
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#define GPIO_ALT_SSP_TXD GPIO(10) /* SSP transmit */
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#define GPIO_ALT_SSP_RXD GPIO(11) /* SSP receive */
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#define GPIO_ALT_SSP_SCLK GPIO(12) /* SSP serial clock */
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#define GPIO_ALT_SSP_SFRM GPIO(13) /* SSP frameclock */
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#define GPIO_ALT_UART_TXD GPIO(14) /* UART transmit */
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#define GPIO_ALT_UART_RXD GPIO(15) /* UART receive */
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#define GPIO_ALT_GPCLK_OUT GPIO(16) /* General-purpose clock out */
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#define GPIO_ALT_UART_SCLK GPIO(18) /* Sample clock input */
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#define GPIO_ALT_SSP_CLK GPIO(19) /* Sample clock input */
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#define GPIO_ALT_UART_SCLK3 GPIO(20) /* Sample clock input */
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#define GPIO_ALT_MCP_CLK GPIO(21) /* MCP dock in */
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#define GPIO_ALT_TREQA GPIO(22) /* Either TIC request A */
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#define GPIO_ALT_TREQB GPIO(23) /* Either TIC request B */
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#define GPIO_ALT_RTC GPIO(25) /* Real Time Clock */
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#define GPIO_ALT_RCLK_OUT GPIO(26) /* internal clock /2 */
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#define GPIO_ALT_32KHZ_OUT GPIO(27) /* Raw 32.768kHz osc output */
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