317 lines
6.6 KiB
C
317 lines
6.6 KiB
C
/* $NetBSD: zs.c,v 1.2 2006/11/03 03:04:53 tsutsui Exp $ */
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/*-
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* Copyright (c) 1996, 2005 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Gordon W. Ross.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Zilog Z8530 Dual UART driver (machine-dependent part)
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*
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* Runs two serial lines per chip using slave drivers.
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* Plain tty/async lines use the zs_async slave.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.2 2006/11/03 03:04:53 tsutsui Exp $");
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/tty.h>
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#include <sys/systm.h>
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#include <machine/z8530var.h>
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#include <dev/ic/z8530reg.h>
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#include "ioconf.h"
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/* console status for consinit() */
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static struct zs_chanstate zs_conscs_store;
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struct zs_chanstate *zs_conscs = &zs_conscs_store;
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void *zs_consaddr;
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/*
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* Some warts needed by z8530tty.c -
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* The default parity REALLY needs to be the same as the PROM uses,
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* or you can not see messages done with printf during boot-up...
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*/
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int zs_def_cflag = (CREAD | CS8 | HUPCL);
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int
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zs_print(void *aux, const char *name)
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{
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struct zsc_attach_args *args = aux;
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if (name != NULL)
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aprint_normal("%s: ", name);
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if (args->channel != -1)
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aprint_normal(" channel %d", args->channel);
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return UNCONF;
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}
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int
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zshard(void *arg)
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{
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struct zsc_softc *zsc;
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int rval;
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zsc = arg;
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rval = zsc_intr_hard(zsc);
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if (zsc->zsc_cs[0]->cs_softreq || zsc->zsc_cs[1]->cs_softreq)
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softintr_schedule(zsc->zsc_si);
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return rval;
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}
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/*
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* Compute the current baud rate given a ZS channel.
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*/
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int
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zs_get_speed(struct zs_chanstate *cs)
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{
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int tconst;
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tconst = zs_read_reg(cs, 12);
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tconst |= zs_read_reg(cs, 13) << 8;
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return TCONST_TO_BPS(cs->cs_brg_clk, tconst);
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}
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/*
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* MD functions for setting the baud rate and control modes.
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*/
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int
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zs_set_speed(struct zs_chanstate *cs, int bps)
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{
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int tconst, real_bps;
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if (bps == 0)
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return 0;
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#ifdef DIAGNOSTIC
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if (cs->cs_brg_clk == 0)
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panic("zs_set_speed");
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#endif
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tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
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if (tconst < 0)
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return EINVAL;
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/* Convert back to make sure we can do it. */
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real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
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/* XXX - Allow some tolerance here? */
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if (real_bps != bps)
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return EINVAL;
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cs->cs_preg[12] = tconst;
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cs->cs_preg[13] = tconst >> 8;
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/* Caller will stuff the pending registers. */
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return 0;
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}
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int
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zs_set_modes(struct zs_chanstate *cs, int cflag)
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{
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int s;
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/*
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* Output hardware flow control on the chip is horrendous:
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* if carrier detect drops, the receiver is disabled, and if
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* CTS drops, the transmitter is stoped IN MID CHARACTER!
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* Therefore, NEVER set the HFC bit, and instead use the
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* status interrupt to detect CTS changes.
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*/
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s = splserial();
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cs->cs_rr0_pps = 0;
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if ((cflag & (CLOCAL | MDMBUF)) != 0) {
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cs->cs_rr0_dcd = 0;
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if ((cflag & MDMBUF) == 0)
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cs->cs_rr0_pps = ZSRR0_DCD;
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} else
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cs->cs_rr0_dcd = ZSRR0_DCD;
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if ((cflag & CRTSCTS) != 0) {
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cs->cs_wr5_dtr = ZSWR5_DTR;
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cs->cs_wr5_rts = ZSWR5_RTS;
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cs->cs_rr0_cts = ZSRR0_CTS;
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} else if ((cflag & MDMBUF) != 0) {
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cs->cs_wr5_dtr = 0;
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cs->cs_wr5_rts = ZSWR5_DTR;
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cs->cs_rr0_cts = ZSRR0_DCD;
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} else {
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cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
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cs->cs_wr5_rts = 0;
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cs->cs_rr0_cts = 0;
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}
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splx(s);
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/* Caller will stuff the pending registers. */
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return 0;
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}
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/*
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* Read or write the chip with suitable delays.
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*/
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uint8_t
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zs_read_reg(struct zs_chanstate *cs, uint8_t reg)
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{
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uint8_t val;
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*cs->cs_reg_csr = reg;
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val = *cs->cs_reg_csr;
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return val;
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}
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void
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zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)
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{
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*cs->cs_reg_csr = reg;
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*cs->cs_reg_csr = val;
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}
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uint8_t
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zs_read_csr(struct zs_chanstate *cs)
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{
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uint8_t val;
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val = *cs->cs_reg_csr;
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return val;
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}
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void
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zs_write_csr(struct zs_chanstate *cs, uint8_t val)
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{
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*cs->cs_reg_csr = val;
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}
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uint8_t
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zs_read_data(struct zs_chanstate *cs)
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{
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uint8_t val;
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val = *cs->cs_reg_data;
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return val;
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}
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void
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zs_write_data(struct zs_chanstate *cs, uint8_t val)
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{
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*cs->cs_reg_data = val;
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}
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void
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zs_abort(struct zs_chanstate *cs)
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{
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#ifdef DDB
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Debugger();
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#endif
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}
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/*
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* Polled input char.
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*/
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int
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zs_getc(void *arg)
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{
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struct zs_chanstate *cs = arg;
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int s, c, rr0;
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s = splhigh();
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/* Wait for a character to arrive. */
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do {
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rr0 = *cs->cs_reg_csr;
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ZS_DELAY();
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} while ((rr0 & ZSRR0_RX_READY) == 0);
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c = *cs->cs_reg_data;
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ZS_DELAY();
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splx(s);
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/*
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* This could be used by the kd driver to read scan codes,
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* so don't translate '\r' ==> '\n' here...
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*/
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return c;
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}
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/*
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* Polled output char.
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*/
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void
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zs_putc(void *arg, int c)
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{
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struct zs_chanstate *cs = arg;
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int s, rr0;
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s = splhigh();
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/* Wait for transmitter to become ready. */
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do {
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rr0 = *cs->cs_reg_csr;
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ZS_DELAY();
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} while ((rr0 & ZSRR0_TX_READY) == 0);
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*cs->cs_reg_data = c;
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ZS_DELAY();
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splx(s);
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}
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int
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zscngetc(dev_t dev)
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{
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return zs_getc((void *)zs_conscs);
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}
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void
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zscnputc(dev_t dev, int c)
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{
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zs_putc((void *)zs_conscs, c);
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}
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