26ab868e68
caveats, but works quite well in a lot of MP cases, and all UP cases that I have tested. Parts of this will hopefully be reworked in the not-too-distant future.
192 lines
6.4 KiB
C
192 lines
6.4 KiB
C
/* $NetBSD: npx.h,v 1.19 2002/10/01 12:57:08 fvdl Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)npx.h 5.3 (Berkeley) 1/18/91
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*/
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/*
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* 287/387 NPX Coprocessor Data Structures and Constants
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* W. Jolitz 1/90
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*/
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#ifndef _I386_NPX_H_
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#define _I386_NPX_H_
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/* Environment information of floating point unit */
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struct env87 {
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long en_cw; /* control word (16bits) */
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long en_sw; /* status word (16bits) */
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long en_tw; /* tag word (16bits) */
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long en_fip; /* floating point instruction pointer */
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u_short en_fcs; /* floating code segment selector */
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u_short en_opcode; /* opcode last executed (11 bits ) */
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long en_foo; /* floating operand offset */
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long en_fos; /* floating operand segment selector */
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};
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/* Contents of each floating point accumulator */
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struct fpacc87 {
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#ifdef dontdef /* too unportable */
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u_long fp_mantlo; /* mantissa low (31:0) */
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u_long fp_manthi; /* mantissa high (63:32) */
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int fp_exp:15; /* exponent */
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int fp_sgn:1; /* mantissa sign */
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#else
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u_char fp_bytes[10];
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#endif
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};
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/* Floating point context */
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struct save87 {
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struct env87 sv_env; /* floating point control/status */
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struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
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#ifndef dontdef
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u_long sv_ex_sw; /* status word for last exception (was pad) */
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u_long sv_ex_tw; /* tag word for last exception (was pad) */
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u_char sv_pad[8 * 2 - 2 * 4]; /* bogus historical padding */
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#endif
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};
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/* Environment of FPU/MMX/SSE/SSE2. */
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struct envxmm {
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/*0*/ uint16_t en_cw; /* FPU Control Word */
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uint16_t en_sw; /* FPU Status Word */
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uint8_t en_rsvd0;
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uint8_t en_tw; /* FPU Tag Word (abridged) */
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uint16_t en_opcode; /* FPU Opcode */
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uint32_t en_fip; /* FPU Instruction Pointer */
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uint16_t en_fcs; /* FPU IP selector */
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uint16_t en_rsvd1;
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/*16*/ uint32_t en_foo; /* FPU Data pointer */
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uint16_t en_fos; /* FPU Data pointer selector */
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uint16_t en_rsvd2;
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uint32_t en_mxcsr; /* MXCSR Register State */
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uint32_t en_rsvd3;
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};
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/* FPU regsters in the extended save format. */
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struct fpaccxmm {
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uint8_t fp_bytes[10];
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uint8_t fp_rsvd[6];
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};
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/* SSE/SSE2 registers. */
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struct xmmreg {
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uint8_t sse_bytes[16];
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};
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/* FPU/MMX/SSE/SSE2 context */
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struct savexmm {
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struct envxmm sv_env; /* control/status context */
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struct fpaccxmm sv_ac[8]; /* ST/MM regs */
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struct xmmreg sv_xmmregs[8]; /* XMM regs */
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uint8_t sv_rsvd[16 * 14];
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/* 512-bytes --- end of hardware portion of save area */
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uint32_t sv_ex_sw; /* saved SW from last exception */
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uint32_t sv_ex_tw; /* saved TW from last exception */
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};
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union savefpu {
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struct save87 sv_87;
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struct savexmm sv_xmm;
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};
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/* Cyrix EMC memory - mapped coprocessor context switch information */
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struct emcsts {
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long em_msw; /* memory mapped status register when swtched */
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long em_tar; /* memory mapped temp A register when swtched */
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long em_dl; /* memory mapped D low register when swtched */
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};
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/*
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* The i387 defaults to Intel extended precision mode and round to nearest,
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* with all exceptions masked.
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*/
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#define __INITIAL_NPXCW__ 0x037f
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/* NetBSD uses IEEE double precision. */
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#define __NetBSD_NPXCW__ 0x127f
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/* FreeBSD leaves some exceptions unmasked as well. */
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#define __FreeBSD_NPXCW__ 0x1272
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/* iBCS2 goes a bit further and leaves the underflow exception unmasked. */
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#define __iBCS2_NPXCW__ 0x0262
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/* Linux just uses the default control word. */
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#define __Linux_NPXCW__ 0x037f
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/* SVR4 uses the same control word as iBCS2. */
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#define __SVR4_NPXCW__ 0x0262
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/*
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* The default MXCSR value at reset is 0x1f80, IA-32 Instruction
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* Set Reference, pg. 3-369.
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*/
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#define __INITIAL_MXCSR__ 0x1f80
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/*
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* The standard control word from finit is 0x37F, giving:
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* round to nearest
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* 64-bit precision
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* all exceptions masked.
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*
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* Now we want:
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* affine mode (if we decide to support 287's)
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* round to nearest
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* 53-bit precision
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* all exceptions masked.
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*
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* 64-bit precision often gives bad results with high level languages
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* because it makes the results of calculations depend on whether
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* intermediate values are stored in memory or in FPU registers.
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*
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* The iBCS control word has underflow, overflow, zero divide, and invalid
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* operation exceptions unmasked. But that causes an unexpected exception
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* in the test program 'paranoia' and makes denormals useless (DBL_MIN / 2
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* underflows). It doesn't make a lot of sense to trap underflow without
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* trapping denormals.
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*/
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#ifdef _KERNEL
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void probeintr(void);
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void probetrap(void);
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int npx586bug1(int, int);
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void npxinit(struct cpu_info *);
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void process_xmm_to_s87(const struct savexmm *, struct save87 *);
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void process_s87_to_xmm(const struct save87 *, struct savexmm *);
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#endif
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#endif /* !_I386_NPX_H_ */
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