181 lines
5.5 KiB
Plaintext
181 lines
5.5 KiB
Plaintext
$NetBSD: TODO,v 1.17 2003/04/06 17:48:51 tsutsui Exp $
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To do list (in some particular order)
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XXX some entries might be obsolete.
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o Boot. Standalone boot program to load ELF kernels instead of
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booting ECOFF kernels directly.
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(maybe sgimips/stand would help, but annoying buggy ARC BIOS)
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o sysinst
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maybe MD fdisk partitioning support is required to load files
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from FAT partition on ARC BIOS prompt.
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o install notes
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o use MI driver
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- use MI ncr53c9x driver instead of home grown asc
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XXX patch is available. needs testers
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- make fd driver MI, and share it with other ports
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(contact christos about MI fd driver)
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- use MI bha driver instead of home grown btl
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XXX needs fixes of DESKstation support
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o VXL framebuffer support (Magnum, RISCstation 2200)
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o com_jazzio.c
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- clock handling clean up (obtain from ARC BIOS)
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- fifo disabling may be only needed on some Magnum?
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o remove pccons and switch to wscons completely
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(XXX what's the problem to remove pccons?)
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o AD1848 audio support
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o missing MI devices
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ses?, vcoda, ...
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o Xserver
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- VXL Magnum, RISCstation 2200
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- vga/S3 PICA, Image RISCstation - OpenBSD's?
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- vga/cirrus RISCserver 2200, Express5800/240 R4400 EISA
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- vga/??? DESKstation Tyne, rPC44
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- TGA RISCstation 2250, Express5800/230 R4400 PCI
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o Find out why bitmap load to S3-928 flashes screen. (X server)
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Know why (enable linear mode). Need S3 info.
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o repair DESKstation support
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- requires bounce buffer bus_dma for Tyne
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XXX - too small bounce buffer size (128KB)
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o Olivetti M700 support
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o NEC Express5800/230 R10000 PCI (NEC-JC95) support
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(needs MI R10000 support)
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o SNI RM200PCI/RM300/RM400/RM600 support
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o parse ARC BIOS configuration information and use it
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o increase MAXPHYS to 64KB
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(XXX why is it limited to 32KB?)
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o fix kernel start address
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(maybe requires bootloader support)
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o allocate PICA_TL_BASE dynamically
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o remove inb/outb
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o remove UADDR
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o fix mem_clusters[] usage.
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o intrcnt[] name cleanup, use MI evcnt(9)
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o test and merge soren's clean up about proc0.p_addr.
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o redesign interrupt handler framework.
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i/o bus devices should have sane IPL, but currently doesn't.
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also, current MIPS interrupt handler has overblocking and
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other problems as follows:
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- SR_INT_IE should be enabled before calling hardclock().
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Since this is not done currently, spllowersoftclock()
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on hardclock() doesn't have effect, and softclock() is
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handled with all interrupt disabled in this case.
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-> overblocking, possibly causes missing hardclock()
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- MIPS3_CLKF_BASEPRI() doesn't work correctly,
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when MIPS_INT_MASK_5 (== MIPS_INT_MASK_CLOCK) is disabled.
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-> micro optimization on hardclock() doesn't work.
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but currently this may make hardclock() latency better
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due to above SR_INT_IE problem.
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s/MIPS_INT_MASK/MIPS3_INT_MASK/ makes this work, although tricky.
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- if (ipending & INT_MASK_REAL_DEV) == 0,
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softnet() and softclock() are handled with all interrupt disabled.
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-> overblocking, possibly causes missing hardclock()
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- softclock() is handled with softnet() disabled.
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-> slightly overblocking
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- `netisr' handling in netintr() implies potential race condition.
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The access to `netisr' should be protected by splnet().
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Currently this is not real problem due to above overblocking.
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`ssir' handling on many mips ports has same problem.
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It should be protected by splnet() or splserial() or splhigh()
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(depends on the highest interrupt level which sets `ssir').
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Since `ssir' is accessed not only by setsoftnet() but also
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by setsoft(), setsoftnet() should protect `ssir' by splserial()
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or something. (i.e. priority level which setsoft() will be called)
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Probably, it is better to split `ssir' variable for each
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priority level.
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Also, _clearsoftintr() should be called before `ssir' access.
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currently this is not real problem due to above overblocking.
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- INT_MASK_REAL_DEV should be removed
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- make CLKF_INTR() work.
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- generic software interrupt
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(see algor, mipsco, pmax etc.)
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- major rework, possibly by software emulated spl.
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splserial()/splsoftserial()
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o it is better to always disable MIPS_INT_MASK_CLOCK.
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those are the points which should be fixed:
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mips_idle: li t0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
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machdep.c: curpcb->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE;
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spl0()
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splnone()
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- MIPS_INT_MASK_CLOCK should be removed in someway
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o XXX at least 2000/06/07 version is already quite unstable
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on PICA and NEC Image RISCstation. (but almost OK on Magnum)
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Userland commands dumps core randomly.
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This version is before _MIPS_PADDR_T_64BIT changes
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and MIPS3_TLB_WIRED_UPAGES changes.
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"vm_page_zero_enable = FALSE" makes this problem disappeared.
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(vm_page_zero_enable = FALSE by default on all archs w/ UBC, now)
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currently, page zero in the idle loop is also disabled on
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untested platforms like DESKstation rPC44/Tyne and SNI for safety.
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XXX what's the current status of uvm_pageidlezero()?
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o resolve "XXX"
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(following entries might be MI MIPS items)
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o Move the RO and WIRED attribute from the pte to the pv table.
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This saves four instructions in the tlb miss handler.
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o Can we have 32 double registers?
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o 64bit kernel/userland
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o fix implementation of DELAY(), clean up clock implementation
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o omit __SWAP_BROKEN in <mips/types.h>
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o clean up ALEAF/NLEAF/NON_LEAF/NNON_LEAF in userland.
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Lots of other things.....
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