869fdfbf12
Reported by Shigeji Ishikawa <psybear@ogre.rim.or.jp> in port-cobalt/12121.
224 lines
4.9 KiB
C
224 lines
4.9 KiB
C
/* $NetBSD: pci_machdep.c,v 1.11 2001/02/05 13:14:21 tsutsui Exp $ */
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/*
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* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#define _COBALT_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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/*
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* PCI doesn't have any special needs; just use
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* the generic versions of these functions.
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*/
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struct cobalt_bus_dma_tag pci_bus_dma_tag = {
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_bus_dmamap_create,
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_bus_dmamap_destroy,
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_bus_dmamap_load,
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_bus_dmamap_load_mbuf,
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_bus_dmamap_load_uio,
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_bus_dmamap_load_raw,
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_bus_dmamap_unload,
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_bus_dmamap_sync,
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_bus_dmamem_alloc,
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_bus_dmamem_free,
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_bus_dmamem_map,
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_bus_dmamem_unmap,
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_bus_dmamem_mmap,
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};
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void
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pci_attach_hook(parent, self, pba)
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struct device *parent, *self;
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struct pcibus_attach_args *pba;
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{
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/* XXX */
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return;
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}
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int
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pci_bus_maxdevs(pc, busno)
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pci_chipset_tag_t pc;
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int busno;
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{
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return 32;
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}
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pcitag_t
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pci_make_tag(pc, bus, device, function)
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pci_chipset_tag_t pc;
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int bus, device, function;
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{
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return (bus << 16) | (device << 11) | (function << 8);
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}
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void
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pci_decompose_tag(pc, tag, bp, dp, fp)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int *bp, *dp, *fp;
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{
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if (bp != NULL)
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*bp = (tag >> 16) & 0xff;
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if (dp != NULL)
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*dp = (tag >> 11) & 0x1f;
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if (fp != NULL)
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*fp = (tag >> 8) & 0x07;
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}
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#define PCI_CFG_ADDR ((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cf8))
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#define PCI_CFG_DATA ((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cfc))
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pcireg_t
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pci_conf_read(pc, tag, reg)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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{
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pcireg_t data;
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int bus, dev, func;
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pci_decompose_tag(pc, tag, &bus, &dev, &func);
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/*
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* 2700 hardware wedges on accesses to device 6.
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*/
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if (bus == 0 && dev == 6)
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return 0;
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/*
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* 2800 hardware wedges on accesses to device 31.
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*/
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if (bus == 0 && dev == 31)
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return 0;
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*PCI_CFG_ADDR = 0x80000000 | tag | reg;
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data = *PCI_CFG_DATA;
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*PCI_CFG_ADDR = 0;
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return data;
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}
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void
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pci_conf_write(pc, tag, reg, data)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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pcireg_t data;
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{
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*PCI_CFG_ADDR = 0x80000000 | tag | reg;
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*PCI_CFG_DATA = data;
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*PCI_CFG_ADDR = 0;
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return;
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}
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int
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pci_intr_map(pa, ihp)
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struct pci_attach_args *pa;
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pci_intr_handle_t *ihp;
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{
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pci_chipset_tag_t pc = pa->pa_pc;
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pcitag_t intrtag = pa->pa_intrtag;
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int pin = pa->pa_intrpin;
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int line = pa->pa_intrline;
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int bus, dev, func;
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pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
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/*
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* The interrupt lines of the two Tulips are connected
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* directly to the CPU.
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*/
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if (bus == 0 && dev == 7 && pin == PCI_INTERRUPT_PIN_A)
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*ihp = 16 + 1;
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else if (bus == 0 && dev == 12 && pin == PCI_INTERRUPT_PIN_A)
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*ihp = 16 + 2;
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else
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*ihp = line;
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return 0;
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}
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const char *
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pci_intr_string(pc, ih)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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{
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static char irqstr[8];
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if (ih >= 16)
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sprintf(irqstr, "level %d", ih - 16);
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else
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sprintf(irqstr, "irq %d", ih);
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return irqstr;
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}
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const struct evcnt *
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pci_intr_evcnt(pc, ih)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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{
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/* XXX for now, no evcnt parent reported */
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return NULL;
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}
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void *
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pci_intr_establish(pc, ih, level, func, arg)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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int level, (*func)(void *);
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void *arg;
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{
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if (ih >= 16)
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return cpu_intr_establish(ih - 16, level, func, arg);
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else
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return icu_intr_establish(ih, IST_LEVEL, level, func, arg);
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}
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void
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pci_intr_disestablish(pc, cookie)
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pci_chipset_tag_t pc;
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void *cookie;
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{
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panic("pci_intr_disestablish: not implemented");
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return;
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}
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