c5e450957a
controller chip.
153 lines
4.6 KiB
C
153 lines
4.6 KiB
C
/* $Id: hd64570var.h,v 1.1 1998/07/26 03:26:57 explorer Exp $ */
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/*
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* Copyright (c) 1998 Vixie Enterprises
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of Vixie Enterprises nor the names
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* of its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY VIXIE ENTERPRISES AND
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* CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL VIXIE ENTERPRISES OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This software has been written for Vixie Enterprises by Michael Graff
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* <explorer@flame.org>. To learn more about Vixie Enterprises, see
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* ``http://www.vix.com''.
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*/
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#ifndef _HD64570VAR_H_
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#define _HD64570VAR_H_
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#include "bpfilter.h"
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#define SCA_USE_FASTQ /* use a split queue, one for fast traffic */
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struct sca_softc;
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typedef struct sca_port sca_port_t;
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typedef struct sca_desc sca_desc_t;
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/*
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* device DMA descriptor
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*/
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struct sca_desc {
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u_int16_t cp; /* chain pointer */
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u_int16_t bp; /* buffer pointer (low bits) */
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u_int8_t bpb; /* buffer pointer (high bits) */
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u_int8_t unused0;
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u_int16_t len; /* total length */
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u_int8_t stat; /* status */
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u_int8_t unused1;
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};
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#define SCA_DESC_EOT 0x01
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#define SCA_DESC_CRC 0x04
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#define SCA_DESC_OVRN 0x08
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#define SCA_DESC_RESD 0x10
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#define SCA_DESC_ABORT 0x20
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#define SCA_DESC_SHRTFRM 0x40
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#define SCA_DESC_EOM 0x80
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#define SCA_DESC_ERRORS 0x7C
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/*
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* softc structure for each port
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*/
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struct sca_port {
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u_int msci_off; /* offset for msci address for this port */
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u_int dmac_off; /* offset of dmac address for this port */
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u_int sp_port;
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/*
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* CISCO keepalive stuff
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*/
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u_int32_t cka_lasttx;
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u_int32_t cka_lastrx;
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/*
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* start of each important bit of information for transmit and
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* receive buffers.
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*/
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u_int32_t txdesc_p;
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sca_desc_t *txdesc;
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u_int32_t txbuf_p;
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u_int8_t *txbuf;
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volatile u_int txcur; /* last descriptor in chain */
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volatile u_int txinuse; /* descriptors in use */
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volatile u_int txstart; /* start descriptor */
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u_int32_t rxdesc_p;
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sca_desc_t *rxdesc;
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u_int32_t rxbuf_p;
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u_int8_t *rxbuf;
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u_int rxstart; /* index of first descriptor */
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u_int rxend; /* index of last descriptor */
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struct ifnet sp_if; /* the network information */
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struct ifqueue linkq; /* link-level packets are high prio */
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#ifdef SCA_USE_FASTQ
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struct ifqueue fastq; /* interactive packets */
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#endif
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#if NBPFILTER > 0
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caddr_t sp_bpf; /* hook for BPF */
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#endif
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struct sca_softc *sca; /* pointer to parent */
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};
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/*
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* softc structure for the chip itself
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*/
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struct sca_softc {
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struct device *parent; /* our parent device, or NULL */
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int sc_numports; /* number of ports present */
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/*
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* a callback into the parent, since the SCA chip has no control
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* over DTR, we have to make a callback into the parent, which
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* might know about DTR.
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*
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* If the function pointer is NULL, no callback is specified.
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*/
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void (*dtr_callback) __P((void *aux, int port, int state));
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void *dtr_aux;
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sca_port_t sc_ports[2];
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bus_space_handle_t sc_ioh;
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bus_space_tag_t sc_iot;
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bus_dma_tag_t sc_dmat; /* bus dma tag */
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bus_dmamap_t sc_dmam; /* bus dma map */
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bus_dma_segment_t sc_seg; /* bus dma segment allocated */
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caddr_t sc_dma_addr; /* kva address of segment */
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u_long sc_allocsize; /* size of region */
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};
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int sca_init(struct sca_softc *, u_int);
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void sca_port_attach(struct sca_softc *, u_int);
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int sca_hardintr(struct sca_softc *);
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void sca_shutdown(struct sca_softc *);
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#endif /* _HD64570VAR_H_ */
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