569 lines
15 KiB
C
569 lines
15 KiB
C
/* $NetBSD: si_vme.c,v 1.15 1998/02/05 04:56:45 gwr Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Adam Glass, David Jones, and Gordon W. Ross.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file contains only the machine-dependent parts of the
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* Sun3 SCSI driver. (Autoconfig stuff and DMA functions.)
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* The machine-independent parts are in ncr5380sbc.c
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*
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* Supported hardware includes:
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* Sun SCSI-3 on OBIO (Sun3/50,Sun3/60)
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* Sun SCSI-3 on VME (Sun3/160,Sun3/260)
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*
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* Could be made to support the Sun3/E if someone wanted to.
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*
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* Note: Both supported variants of the Sun SCSI-3 adapter have
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* some really unusual "features" for this driver to deal with,
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* generally related to the DMA engine. The OBIO variant will
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* ignore any attempt to write the FIFO count register while the
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* SCSI bus is in DATA_IN or DATA_OUT phase. This is dealt with
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* by setting the FIFO count early in COMMAND or MSG_IN phase.
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*
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* The VME variant has a bit to enable or disable the DMA engine,
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* but that bit also gates the interrupt line from the NCR5380!
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* Therefore, in order to get any interrupt from the 5380, (i.e.
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* for reselect) one must clear the DMA engine transfer count and
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* then enable DMA. This has the further complication that you
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* CAN NOT touch the NCR5380 while the DMA enable bit is set, so
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* we have to turn DMA back off before we even look at the 5380.
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*
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* What wonderfully whacky hardware this is!
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*
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* Credits, history:
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*
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* David Jones wrote the initial version of this module, which
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* included support for the VME adapter only. (no reselection).
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*
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* Gordon Ross added support for the OBIO adapter, and re-worked
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* both the VME and OBIO code to support disconnect/reselect.
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* (Required figuring out the hardware "features" noted above.)
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*
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* The autoconfiguration boilerplate came from Adam Glass.
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*/
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/*****************************************************************
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* VME functions for DMA
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****************************************************************/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/buf.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsipi_debug.h>
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#include <dev/scsipi/scsiconf.h>
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#include <machine/autoconf.h>
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#include <machine/dvma.h>
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/* #define DEBUG XXX */
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#include <dev/ic/ncr5380reg.h>
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#include <dev/ic/ncr5380var.h>
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#include "sireg.h"
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#include "sivar.h"
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void si_vme_dma_setup __P((struct ncr5380_softc *));
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void si_vme_dma_start __P((struct ncr5380_softc *));
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void si_vme_dma_eop __P((struct ncr5380_softc *));
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void si_vme_dma_stop __P((struct ncr5380_softc *));
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void si_vme_intr_on __P((struct ncr5380_softc *));
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void si_vme_intr_off __P((struct ncr5380_softc *));
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static void si_vme_reset __P((struct ncr5380_softc *));
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/*
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* New-style autoconfig attachment
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*/
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static int si_vme_match __P((struct device *, struct cfdata *, void *));
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static void si_vme_attach __P((struct device *, struct device *, void *));
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struct cfattach si_vme_ca = {
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sizeof(struct si_softc), si_vme_match, si_vme_attach
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};
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/*
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* Options for disconnect/reselect, DMA, and interrupts.
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* By default, allow disconnect/reselect on targets 4-6.
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* Those are normally tapes that really need it enabled.
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*/
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int si_vme_options = 0x0f;
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static int
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si_vme_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct confargs *ca = aux;
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int probe_addr;
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/* No default VME address. */
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if (ca->ca_paddr == -1)
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return (0);
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/* Make sure something is there... */
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probe_addr = ca->ca_paddr + 1;
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if (bus_peek(ca->ca_bustype, probe_addr, 1) == -1)
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return (0);
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/*
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* If this is a VME SCSI board, we have to determine whether
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* it is an "sc" (Sun2) or "si" (Sun3) SCSI board. This can
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* be determined using the fact that the "sc" board occupies
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* 4K bytes in VME space but the "si" board occupies 2K bytes.
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*/
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/* Note: the "si" board should NOT respond here. */
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probe_addr = ca->ca_paddr + 0x801;
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if (bus_peek(ca->ca_bustype, probe_addr, 1) != -1) {
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/* Something responded at 2K+1. Maybe an "sc" board? */
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#ifdef DEBUG
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printf("si_vme_match: May be an `sc' board at pa=0x%x\n",
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ca->ca_paddr);
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#endif
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return(0);
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}
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/* Default interrupt priority. */
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if (ca->ca_intpri == -1)
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ca->ca_intpri = 2;
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return (1);
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}
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static void
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si_vme_attach(parent, self, args)
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struct device *parent, *self;
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void *args;
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{
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struct si_softc *sc = (struct si_softc *) self;
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struct ncr5380_softc *ncr_sc = &sc->ncr_sc;
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struct cfdata *cf = self->dv_cfdata;
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struct confargs *ca = args;
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/* Get options from config flags if specified. */
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if (cf->cf_flags)
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sc->sc_options = cf->cf_flags;
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else
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sc->sc_options = si_vme_options;
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printf(": options=0x%x\n", sc->sc_options);
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sc->sc_adapter_type = ca->ca_bustype;
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sc->sc_regs = (struct si_regs *)
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bus_mapin(ca->ca_bustype, ca->ca_paddr,
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sizeof(struct si_regs));
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sc->sc_adapter_iv_am =
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VME_SUPV_DATA_24 | (ca->ca_intvec & 0xFF);
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/*
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* MD function pointers used by the MI code.
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*/
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ncr_sc->sc_pio_out = ncr5380_pio_out;
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ncr_sc->sc_pio_in = ncr5380_pio_in;
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ncr_sc->sc_dma_alloc = si_dma_alloc;
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ncr_sc->sc_dma_free = si_dma_free;
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ncr_sc->sc_dma_setup = si_vme_dma_setup;
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ncr_sc->sc_dma_start = si_vme_dma_start;
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ncr_sc->sc_dma_poll = si_dma_poll;
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ncr_sc->sc_dma_eop = si_vme_dma_eop;
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ncr_sc->sc_dma_stop = si_vme_dma_stop;
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ncr_sc->sc_intr_on = si_vme_intr_on;
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ncr_sc->sc_intr_off = si_vme_intr_off;
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/* Attach interrupt handler. */
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isr_add_vectored(si_intr, (void *)sc,
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ca->ca_intpri, ca->ca_intvec);
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/* Reset the hardware. */
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si_vme_reset(ncr_sc);
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/* Do the common attach stuff. */
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si_attach(sc);
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}
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static void
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si_vme_reset(struct ncr5380_softc *ncr_sc)
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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volatile struct si_regs *si = sc->sc_regs;
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#ifdef DEBUG
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if (si_debug) {
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printf("si_vme_reset\n");
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}
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#endif
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/*
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* The SCSI3 controller has an 8K FIFO to buffer data between the
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* 5380 and the DMA. Make sure it starts out empty.
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*
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* The reset bits in the CSR are active low.
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*/
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si->si_csr = 0;
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delay(10);
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si->si_csr = SI_CSR_FIFO_RES | SI_CSR_SCSI_RES | SI_CSR_INTR_EN;
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delay(10);
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si->fifo_count = 0;
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/* Make sure the DMA engine is stopped. */
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si->dma_addrh = 0;
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si->dma_addrl = 0;
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si->dma_counth = 0;
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si->dma_countl = 0;
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si->si_iv_am = sc->sc_adapter_iv_am;
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si->fifo_cnt_hi = 0;
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}
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/*
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* This is called when the bus is going idle,
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* so we want to enable the SBC interrupts.
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* That is controlled by the DMA enable!
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* Who would have guessed!
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* What a NASTY trick!
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*/
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void
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si_vme_intr_on(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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volatile struct si_regs *si = sc->sc_regs;
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/* receive mode should be safer */
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si->si_csr &= ~SI_CSR_SEND;
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/* Clear the count so nothing happens. */
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si->dma_counth = 0;
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si->dma_countl = 0;
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/* Clear the start address too. (paranoid?) */
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si->dma_addrh = 0;
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si->dma_addrl = 0;
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/* Finally, enable the DMA engine. */
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si->si_csr |= SI_CSR_DMA_EN;
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}
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/*
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* This is called when the bus is idle and we are
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* about to start playing with the SBC chip.
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*/
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void
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si_vme_intr_off(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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volatile struct si_regs *si = sc->sc_regs;
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si->si_csr &= ~SI_CSR_DMA_EN;
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}
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/*
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* This function is called during the COMMAND or MSG_IN phase
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* that preceeds a DATA_IN or DATA_OUT phase, in case we need
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* to setup the DMA engine before the bus enters a DATA phase.
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*
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* XXX: The VME adapter appears to suppress SBC interrupts
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* when the FIFO is not empty or the FIFO count is non-zero!
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*
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* On the VME version, setup the start addres, but clear the
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* count (to make sure it stays idle) and set that later.
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*/
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void
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si_vme_dma_setup(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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struct sci_req *sr = ncr_sc->sc_current;
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struct si_dma_handle *dh = sr->sr_dma_hand;
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volatile struct si_regs *si = sc->sc_regs;
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long data_pa;
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int xlen;
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/*
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* Get the DVMA mapping for this segment.
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* XXX - Should separate allocation and mapin.
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*/
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data_pa = dvma_kvtopa(dh->dh_dvma, sc->sc_adapter_type);
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data_pa += (ncr_sc->sc_dataptr - dh->dh_addr);
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if (data_pa & 1)
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panic("si_dma_start: bad pa=0x%lx", data_pa);
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xlen = ncr_sc->sc_datalen;
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xlen &= ~1; /* XXX: necessary? */
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sc->sc_reqlen = xlen; /* XXX: or less? */
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#ifdef DEBUG
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if (si_debug & 2) {
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printf("si_dma_setup: dh=%p, pa=0x%lx, xlen=0x%x\n",
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dh, data_pa, xlen);
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}
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#endif
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/* Set direction (send/recv) */
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if (dh->dh_flags & SIDH_OUT) {
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si->si_csr |= SI_CSR_SEND;
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} else {
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si->si_csr &= ~SI_CSR_SEND;
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}
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/* Reset the FIFO. */
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si->si_csr &= ~SI_CSR_FIFO_RES; /* active low */
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si->si_csr |= SI_CSR_FIFO_RES;
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if (data_pa & 2) {
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si->si_csr |= SI_CSR_BPCON;
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} else {
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si->si_csr &= ~SI_CSR_BPCON;
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}
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/* Load the start address. */
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si->dma_addrh = (ushort)(data_pa >> 16);
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si->dma_addrl = (ushort)(data_pa & 0xFFFF);
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/*
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* Keep the count zero or it may start early!
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*/
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si->dma_counth = 0;
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si->dma_countl = 0;
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#if 0
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/* Clear FIFO counter. (also hits dma_count) */
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si->fifo_cnt_hi = 0;
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si->fifo_count = 0;
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#endif
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}
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void
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si_vme_dma_start(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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struct sci_req *sr = ncr_sc->sc_current;
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struct si_dma_handle *dh = sr->sr_dma_hand;
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volatile struct si_regs *si = sc->sc_regs;
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int s, xlen;
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xlen = sc->sc_reqlen;
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/* This MAY be time critical (not sure). */
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s = splhigh();
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si->dma_counth = (ushort)(xlen >> 16);
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si->dma_countl = (ushort)(xlen & 0xFFFF);
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/* Set it anyway, even though dma_count hits it. */
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si->fifo_cnt_hi = (ushort)(xlen >> 16);
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si->fifo_count = (ushort)(xlen & 0xFFFF);
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/*
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* Acknowledge the phase change. (After DMA setup!)
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* Put the SBIC into DMA mode, and start the transfer.
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*/
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if (dh->dh_flags & SIDH_OUT) {
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*ncr_sc->sci_tcmd = PHASE_DATA_OUT;
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SCI_CLR_INTR(ncr_sc);
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*ncr_sc->sci_icmd = SCI_ICMD_DATA;
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*ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE);
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*ncr_sc->sci_dma_send = 0; /* start it */
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} else {
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*ncr_sc->sci_tcmd = PHASE_DATA_IN;
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SCI_CLR_INTR(ncr_sc);
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*ncr_sc->sci_icmd = 0;
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*ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE);
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*ncr_sc->sci_irecv = 0; /* start it */
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}
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/* Let'er rip! */
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si->si_csr |= SI_CSR_DMA_EN;
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splx(s);
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ncr_sc->sc_state |= NCR_DOINGDMA;
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#ifdef DEBUG
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if (si_debug & 2) {
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printf("si_dma_start: started, flags=0x%x\n",
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ncr_sc->sc_state);
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}
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#endif
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}
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void
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si_vme_dma_eop(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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/* Not needed - DMA was stopped prior to examining sci_csr */
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}
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void
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si_vme_dma_stop(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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struct sci_req *sr = ncr_sc->sc_current;
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struct si_dma_handle *dh = sr->sr_dma_hand;
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volatile struct si_regs *si = sc->sc_regs;
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int resid, ntrans;
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if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) {
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#ifdef DEBUG
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printf("si_dma_stop: dma not running\n");
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#endif
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return;
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}
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ncr_sc->sc_state &= ~NCR_DOINGDMA;
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/* First, halt the DMA engine. */
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si->si_csr &= ~SI_CSR_DMA_EN; /* VME only */
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/* Set an impossible phase to prevent data movement? */
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*ncr_sc->sci_tcmd = PHASE_INVALID;
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if (si->si_csr & (SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR)) {
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printf("si: DMA error, csr=0x%x, reset\n", si->si_csr);
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sr->sr_xs->error = XS_DRIVER_STUFFUP;
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ncr_sc->sc_state |= NCR_ABORTING;
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si_vme_reset(ncr_sc);
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goto out;
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}
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/* Note that timeout may have set the error flag. */
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if (ncr_sc->sc_state & NCR_ABORTING)
|
|
goto out;
|
|
|
|
/* XXX: Wait for DMA to actually finish? */
|
|
|
|
/*
|
|
* Now try to figure out how much actually transferred
|
|
*
|
|
* The fifo_count does not reflect how many bytes were
|
|
* actually transferred for VME.
|
|
*
|
|
* SCSI-3 VME interface is a little funny on writes:
|
|
* if we have a disconnect, the dma has overshot by
|
|
* one byte and the resid needs to be incremented.
|
|
* Only happens for partial transfers.
|
|
* (Thanks to Matt Jacob)
|
|
*/
|
|
|
|
resid = si->fifo_count & 0xFFFF;
|
|
if (dh->dh_flags & SIDH_OUT)
|
|
if ((resid > 0) && (resid < sc->sc_reqlen))
|
|
resid++;
|
|
ntrans = sc->sc_reqlen - resid;
|
|
|
|
#ifdef DEBUG
|
|
if (si_debug & 2) {
|
|
printf("si_dma_stop: resid=0x%x ntrans=0x%x\n",
|
|
resid, ntrans);
|
|
}
|
|
#endif
|
|
|
|
if (ntrans < MIN_DMA_LEN) {
|
|
printf("si: fifo count: 0x%x\n", resid);
|
|
ncr_sc->sc_state |= NCR_ABORTING;
|
|
goto out;
|
|
}
|
|
if (ntrans > ncr_sc->sc_datalen)
|
|
panic("si_dma_stop: excess transfer");
|
|
|
|
/* Adjust data pointer */
|
|
ncr_sc->sc_dataptr += ntrans;
|
|
ncr_sc->sc_datalen -= ntrans;
|
|
|
|
/*
|
|
* After a read, we may need to clean-up
|
|
* "Left-over bytes" (yuck!)
|
|
*/
|
|
if (((dh->dh_flags & SIDH_OUT) == 0) &&
|
|
((si->si_csr & SI_CSR_LOB) != 0))
|
|
{
|
|
char *cp = ncr_sc->sc_dataptr;
|
|
#ifdef DEBUG
|
|
printf("si: Got Left-over bytes!\n");
|
|
#endif
|
|
if (si->si_csr & SI_CSR_BPCON) {
|
|
/* have SI_CSR_BPCON */
|
|
cp[-1] = (si->si_bprl & 0xff00) >> 8;
|
|
} else {
|
|
switch (si->si_csr & SI_CSR_LOB) {
|
|
case SI_CSR_LOB_THREE:
|
|
cp[-3] = (si->si_bprh & 0xff00) >> 8;
|
|
cp[-2] = (si->si_bprh & 0x00ff);
|
|
cp[-1] = (si->si_bprl & 0xff00) >> 8;
|
|
break;
|
|
case SI_CSR_LOB_TWO:
|
|
cp[-2] = (si->si_bprh & 0xff00) >> 8;
|
|
cp[-1] = (si->si_bprh & 0x00ff);
|
|
break;
|
|
case SI_CSR_LOB_ONE:
|
|
cp[-1] = (si->si_bprh & 0xff00) >> 8;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
out:
|
|
si->dma_addrh = 0;
|
|
si->dma_addrl = 0;
|
|
|
|
si->dma_counth = 0;
|
|
si->dma_countl = 0;
|
|
|
|
si->fifo_cnt_hi = 0;
|
|
si->fifo_count = 0;
|
|
|
|
/* Put SBIC back in PIO mode. */
|
|
*ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE);
|
|
*ncr_sc->sci_icmd = 0;
|
|
}
|