18b2f7e6a1
by Eduardo Horvath and Simon Burge of Wasabi Systems.
IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.
18 lines
512 B
C
18 lines
512 B
C
/* $NetBSD: psl.h,v 1.1 2001/06/13 06:01:58 simonb Exp $ */
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#include <powerpc/psl.h>
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/* Apparently we get unexplained machine checks, so disable them. */
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#undef PSL_USERSET
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#define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR | PSL_RI)
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/*
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* We also need to override the PSL_SE bit. 4xx have completely
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* different debug register support.
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*
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* The SE bit is actually the DWE bit. We want to set the DE bit
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* to enable the debug regs instead of the DWE bit.
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*/
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#undef PSL_SE
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#define PSL_SE 0x00000200
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