436 lines
10 KiB
C
436 lines
10 KiB
C
/* $NetBSD: pci_machdep.c,v 1.11 2000/06/04 19:14:49 cgd Exp $ */
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/*
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles M. Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Machine-specific functions for PCI autoconfiguration.
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*
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* On PCs, there are two methods of generating PCI configuration cycles.
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* We try to detect the appropriate mechanism for this machine and set
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* up a few function pointers to access the correct method directly.
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*
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* The configuration method can be hard-coded in the config file by
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* using `options PCI_CONF_MODE=N', where `N' is the configuration mode
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* as defined section 3.6.4.1, `Generating Configuration Cycles'.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#define _MACPPC_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/bus.h>
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#include <machine/pio.h>
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#include <machine/intr.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_pci.h>
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static void fixpci __P((int, pci_chipset_tag_t));
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static int find_node_intr __P((int, u_int32_t *, u_int32_t *));
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/*
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* PCI doesn't have any special needs; just use the generic versions
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* of these functions.
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*/
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struct macppc_bus_dma_tag pci_bus_dma_tag = {
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0, /* _bounce_thresh */
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_bus_dmamap_create,
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_bus_dmamap_destroy,
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_bus_dmamap_load,
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_bus_dmamap_load_mbuf,
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_bus_dmamap_load_uio,
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_bus_dmamap_load_raw,
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_bus_dmamap_unload,
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NULL, /* _dmamap_sync */
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_bus_dmamem_alloc,
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_bus_dmamem_free,
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_bus_dmamem_map,
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_bus_dmamem_unmap,
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_bus_dmamem_mmap,
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};
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void
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pci_attach_hook(parent, self, pba)
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struct device *parent, *self;
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struct pcibus_attach_args *pba;
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{
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pci_chipset_tag_t pc = pba->pba_pc;
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int bus = pba->pba_bus;
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int node, nn, sz;
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int32_t busrange[2];
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for (node = pc->node; node; node = nn) {
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sz = OF_getprop(node, "bus-range", busrange, 8);
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if (sz == 8 && busrange[0] == bus) {
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fixpci(node, pc);
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return;
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}
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if ((nn = OF_child(node)) != 0)
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continue;
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while ((nn = OF_peer(node)) == 0) {
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node = OF_parent(node);
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if (node == pc->node)
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return; /* not found */
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}
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}
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}
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int
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pci_bus_maxdevs(pc, busno)
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pci_chipset_tag_t pc;
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int busno;
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{
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/*
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* Bus number is irrelevant. Configuration Mechanism 1 is in
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* use, can have devices 0-32 (i.e. the `normal' range).
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*/
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return 32;
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}
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pcitag_t
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pci_make_tag(pc, bus, device, function)
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pci_chipset_tag_t pc;
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int bus, device, function;
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{
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pcitag_t tag;
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if (bus >= 256 || device >= 32 || function >= 8)
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panic("pci_make_tag: bad request");
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/* XXX magic number */
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tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
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return tag;
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}
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void
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pci_decompose_tag(pc, tag, bp, dp, fp)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int *bp, *dp, *fp;
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{
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if (bp != NULL)
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*bp = (tag >> 16) & 0xff;
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if (dp != NULL)
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*dp = (tag >> 11) & 0x1f;
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if (fp != NULL)
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*fp = (tag >> 8) & 0x07;
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}
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pcireg_t
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pci_conf_read(pc, tag, reg)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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{
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return (*pc->conf_read)(pc, tag, reg);
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}
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void
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pci_conf_write(pc, tag, reg, data)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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pcireg_t data;
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{
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(*pc->conf_write)(pc, tag, reg, data);
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}
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int
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pci_intr_map(pc, intrtag, pin, line, ihp)
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pci_chipset_tag_t pc;
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pcitag_t intrtag;
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int pin, line;
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pci_intr_handle_t *ihp;
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{
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if (pin == 0) {
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/* No IRQ used. */
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goto bad;
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}
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if (pin > 4) {
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printf("pci_intr_map: bad interrupt pin %d\n", pin);
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goto bad;
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}
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/*
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* Section 6.2.4, `Miscellaneous Functions', says that 255 means
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* `unknown' or `no connection' on a PC. We assume that a device with
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* `no connection' either doesn't have an interrupt (in which case the
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* pin number should be 0, and would have been noticed above), or
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* wasn't configured by the BIOS (in which case we punt, since there's
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* no real way we can know how the interrupt lines are mapped in the
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* hardware).
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*
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* XXX
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* Since IRQ 0 is only used by the clock, and we can't actually be sure
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* that the BIOS did its job, we also recognize that as meaning that
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* the BIOS has not configured the device.
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*/
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if (line == 0 || line == 255) {
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printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
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goto bad;
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} else {
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if (line >= ICU_LEN) {
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printf("pci_intr_map: bad interrupt line %d\n", line);
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goto bad;
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}
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}
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*ihp = line;
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return 0;
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bad:
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*ihp = -1;
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return 1;
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}
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const char *
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pci_intr_string(pc, ih)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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{
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static char irqstr[8]; /* 4 + 2 + NULL + sanity */
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if (ih == 0 || ih >= ICU_LEN)
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panic("pci_intr_string: bogus handle 0x%x\n", ih);
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sprintf(irqstr, "irq %d", ih);
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return (irqstr);
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}
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const struct evcnt *
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pci_intr_evcnt(pc, ih)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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{
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/* XXX for now, no evcnt parent reported */
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return NULL;
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}
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extern void * intr_establish();
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extern void intr_disestablish();
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void *
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pci_intr_establish(pc, ih, level, func, arg)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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int level, (*func) __P((void *));
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void *arg;
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{
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if (ih == 0 || ih >= ICU_LEN)
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panic("pci_intr_establish: bogus handle 0x%x\n", ih);
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return intr_establish(ih, IST_LEVEL, level, func, arg);
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}
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void
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pci_intr_disestablish(pc, cookie)
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pci_chipset_tag_t pc;
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void *cookie;
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{
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intr_disestablish(cookie);
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}
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#define pcibus(x) \
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(((x) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
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#define pcidev(x) \
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(((x) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
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#define pcifunc(x) \
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(((x) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
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void
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fixpci(parent, pc)
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int parent;
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pci_chipset_tag_t pc;
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{
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int node;
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pcitag_t tag;
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pcireg_t csr, intr;
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int len, i;
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int32_t irqs[4];
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struct {
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u_int32_t phys_hi, phys_mid, phys_lo;
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u_int32_t size_hi, size_lo;
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} addr[8];
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for (node = OF_child(parent); node; node = OF_peer(node)) {
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len = OF_getprop(node, "assigned-addresses", addr,
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sizeof(addr));
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if (len < (int)sizeof(addr[0]))
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continue;
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tag = pci_make_tag(pc, pcibus(addr[0].phys_hi),
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pcidev(addr[0].phys_hi),
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pcifunc(addr[0].phys_hi));
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/*
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* Make sure the IO and MEM enable bits are set in the CSR.
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*/
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
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for (i = 0; i < len / sizeof(addr[0]); i++) {
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switch (addr[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
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case OFW_PCI_PHYS_HI_SPACE_IO:
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csr |= PCI_COMMAND_IO_ENABLE;
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break;
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case OFW_PCI_PHYS_HI_SPACE_MEM32:
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csr |= PCI_COMMAND_MEM_ENABLE;
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break;
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}
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}
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pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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/*
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* Make sure the line register is programmed with the
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* interrupt mapping.
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*/
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if (find_node_intr(node, &addr[0].phys_hi, irqs) == -1)
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continue;
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intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
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intr &= ~PCI_INTERRUPT_LINE_MASK;
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intr |= irqs[0] & PCI_INTERRUPT_LINE_MASK;
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pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
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}
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}
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/*
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* Find PCI IRQ of the node from OF tree.
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*/
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int
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find_node_intr(node, addr, intr)
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int node;
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u_int32_t *addr, *intr;
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{
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int parent, len, mlen, iparent;
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int match, i;
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u_int32_t map[64], *mp;
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u_int32_t imask[8], maskedaddr[8];
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u_int32_t icells;
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char name[32];
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len = OF_getprop(node, "AAPL,interrupts", intr, 4) ;
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if (len == 4)
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return len;
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parent = OF_parent(node);
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len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
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mlen = OF_getprop(parent, "interrupt-map-mask", imask, sizeof(imask));
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if (len == -1 || mlen == -1)
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goto nomap;
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#ifdef DIAGNOSTIC
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if (mlen == sizeof(imask)) {
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printf("interrupt-map too long\n");
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return -1;
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}
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#endif
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/* mask addr by "interrupt-map-mask" */
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bcopy(addr, maskedaddr, mlen);
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for (i = 0; i < mlen / 4; i++)
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maskedaddr[i] &= imask[i];
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mp = map;
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while (len > mlen) {
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match = bcmp(maskedaddr, mp, mlen);
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mp += mlen / 4;
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len -= mlen;
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/*
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* We must read "#interrupt-cells" for each time because
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* interrupt-parent may be defferent.
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*
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* XXX assume #address-cells == 1
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*/
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iparent = *mp++;
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len -= 4;
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if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
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return -1;
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/* Found. */
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if (match == 0) {
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bcopy(mp, intr, icells * 4);
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return icells * 4;
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}
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mp += icells;
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len -= icells * 4;
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}
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nomap:
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/*
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* If the node has no interrupt property and the parent is a
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* pci-bridge, use parent's interrupt. This occurs on a PCI
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* slot. (e.g. AHA-3940)
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*/
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bzero(name, sizeof(name));
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OF_getprop(parent, "name", name, sizeof(name));
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if (strcmp(name, "pci-bridge") == 0) {
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len = OF_getprop(parent, "AAPL,interrupts", intr, 4) ;
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if (len == 4)
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return len;
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}
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/* XXX This may be wrong... */
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len = OF_getprop(node, "interrupts", intr, 4) ;
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if (len == 4)
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return len;
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return -1;
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}
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