336 lines
8.3 KiB
C
336 lines
8.3 KiB
C
/* $NetBSD: vga_pci.c,v 1.40 2008/03/14 22:12:08 cube Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.40 2008/03/14 22:12:08 cube Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciio.h>
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#include <dev/ic/mc6845reg.h>
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#include <dev/ic/pcdisplayvar.h>
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#include <dev/ic/vgareg.h>
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#include <dev/ic/vgavar.h>
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#include <dev/pci/vga_pcivar.h>
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#include <dev/isa/isareg.h> /* For legacy VGA address ranges */
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#include <dev/wscons/wsconsio.h>
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#include <dev/wscons/wsdisplayvar.h>
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#include "opt_vga.h"
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#ifdef VGA_POST
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#include <x86/vga_post.h>
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#endif
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#define NBARS 6 /* number of PCI BARs */
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struct vga_bar {
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bus_addr_t vb_base;
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bus_size_t vb_size;
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pcireg_t vb_type;
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int vb_flags;
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};
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struct vga_pci_softc {
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struct vga_softc sc_vga;
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pci_chipset_tag_t sc_pc;
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pcitag_t sc_pcitag;
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struct vga_bar sc_bars[NBARS];
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struct vga_bar sc_rom;
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#ifdef VGA_POST
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struct vga_post *sc_posth;
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#endif
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};
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static int vga_pci_match(struct device *, struct cfdata *, void *);
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static void vga_pci_attach(struct device *, struct device *, void *);
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static int vga_pci_lookup_quirks(struct pci_attach_args *);
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static bool vga_pci_resume(device_t dv PMF_FN_PROTO);
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CFATTACH_DECL_NEW(vga_pci, sizeof(struct vga_pci_softc),
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vga_pci_match, vga_pci_attach, NULL, NULL);
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static int vga_pci_ioctl(void *, u_long, void *, int, struct lwp *);
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static paddr_t vga_pci_mmap(void *, off_t, int);
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static const struct vga_funcs vga_pci_funcs = {
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vga_pci_ioctl,
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vga_pci_mmap,
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};
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static const struct {
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int id;
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int quirks;
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} vga_pci_quirks[] = {
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{PCI_ID_CODE(PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM712),
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VGA_QUIRK_NOFASTSCROLL},
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};
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static const struct {
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int vid;
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int quirks;
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} vga_pci_vquirks[] = {
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{PCI_VENDOR_ATI, VGA_QUIRK_ONEFONT},
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};
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static int
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vga_pci_lookup_quirks(struct pci_attach_args *pa)
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{
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int i;
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for (i = 0; i < sizeof(vga_pci_quirks) / sizeof (vga_pci_quirks[0]);
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i++) {
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if (vga_pci_quirks[i].id == pa->pa_id)
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return (vga_pci_quirks[i].quirks);
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}
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for (i = 0; i < sizeof(vga_pci_vquirks) / sizeof (vga_pci_vquirks[0]);
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i++) {
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if (vga_pci_vquirks[i].vid == PCI_VENDOR(pa->pa_id))
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return (vga_pci_vquirks[i].quirks);
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}
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return (0);
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}
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static int
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vga_pci_match(struct device *parent, struct cfdata *match,
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void *aux)
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{
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struct pci_attach_args *pa = aux;
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int potential;
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potential = 0;
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/*
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* If it's prehistoric/vga or display/vga, we might match.
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* For the console device, this is just a sanity check.
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*/
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if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC &&
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PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA)
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potential = 1;
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if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY &&
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PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA)
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potential = 1;
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if (!potential)
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return (0);
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/* check whether it is disabled by firmware */
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if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG)
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& (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
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!= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
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return (0);
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/* If it's the console, we have a winner! */
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if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA))
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return (1);
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/*
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* If we might match, make sure that the card actually looks OK.
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*/
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if (!vga_common_probe(pa->pa_iot, pa->pa_memt))
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return (0);
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return (1);
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}
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static void
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vga_pci_attach(struct device *parent, struct device *self, void *aux)
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{
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struct vga_pci_softc *psc = device_private(self);
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struct vga_softc *sc = &psc->sc_vga;
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struct pci_attach_args *pa = aux;
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char devinfo[256];
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int bar, reg;
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sc->sc_dev = self;
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psc->sc_pc = pa->pa_pc;
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psc->sc_pcitag = pa->pa_tag;
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
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aprint_naive("\n");
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aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
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PCI_REVISION(pa->pa_class));
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/*
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* Gather info about all the BARs. These are used to allow
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* the X server to map the VGA device.
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*/
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for (bar = 0; bar < NBARS; bar++) {
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reg = PCI_MAPREG_START + (bar * 4);
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if (!pci_mapreg_probe(psc->sc_pc, psc->sc_pcitag, reg,
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&psc->sc_bars[bar].vb_type)) {
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/* there is no valid mapping register */
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continue;
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}
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if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) ==
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PCI_MAPREG_TYPE_IO) {
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/* Don't bother fetching I/O BARs. */
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continue;
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}
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#ifndef __LP64__
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if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) ==
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PCI_MAPREG_MEM_TYPE_64BIT) {
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/* XXX */
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aprint_error_dev(self,
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"WARNING: ignoring 64-bit BAR @ 0x%02x\n", reg);
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bar++;
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continue;
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}
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#endif
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if (pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg,
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psc->sc_bars[bar].vb_type,
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&psc->sc_bars[bar].vb_base,
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&psc->sc_bars[bar].vb_size,
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&psc->sc_bars[bar].vb_flags))
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aprint_error_dev(self,
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"WARNING: strange BAR @ 0x%02x\n", reg);
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}
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/* XXX Expansion ROM? */
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vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA,
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vga_pci_lookup_quirks(pa), &vga_pci_funcs);
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#ifdef VGA_POST
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psc->sc_posth = vga_post_init(pa->pa_bus, pa->pa_device, pa->pa_function);
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if (psc->sc_posth == NULL)
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aprint_error_dev(self, "WARNING: could not prepare POST handler\n");
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#endif
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/*
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* XXX Do not use the generic PCI framework for now as
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* XXX it would power down the device when the console
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* XXX is still using it.
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*/
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if (!pmf_device_register(self, NULL, vga_pci_resume))
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aprint_error_dev(self, "couldn't establish power handler\n");
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config_found_ia(self, "drm", aux, vga_drm_print);
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}
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static bool
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vga_pci_resume(device_t dv PMF_FN_ARGS)
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{
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struct vga_pci_softc *sc = device_private(dv);
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vga_resume(&sc->sc_vga);
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#ifdef VGA_POST
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if (sc->sc_posth != NULL)
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vga_post_call(sc->sc_posth);
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#endif
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return true;
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}
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int
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vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt,
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pci_chipset_tag_t pc, int bus, int device,
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int function)
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{
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return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0));
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}
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int
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vga_drm_print(void *aux, const char *pnp)
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{
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if (pnp)
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aprint_normal("direct rendering for %s", pnp);
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return (UNSUPP);
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}
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static int
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vga_pci_ioctl(void *v, u_long cmd, void *data, int flag, struct lwp *l)
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{
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struct vga_config *vc = v;
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struct vga_pci_softc *psc = (void *) vc->softc;
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switch (cmd) {
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/* PCI config read/write passthrough. */
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case PCI_IOC_CFGREAD:
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case PCI_IOC_CFGWRITE:
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return (pci_devioctl(psc->sc_pc, psc->sc_pcitag,
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cmd, data, flag, l));
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default:
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return (EPASSTHROUGH);
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}
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}
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static paddr_t
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vga_pci_mmap(void *v, off_t offset, int prot)
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{
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struct vga_config *vc = v;
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struct vga_pci_softc *psc = (void *) vc->softc;
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struct vga_bar *vb;
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int bar;
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for (bar = 0; bar < NBARS; bar++) {
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vb = &psc->sc_bars[bar];
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if (vb->vb_size == 0)
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continue;
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if (offset >= vb->vb_base &&
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offset < (vb->vb_base + vb->vb_size)) {
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/* XXX This the right thing to do with flags? */
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return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base,
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(offset - vb->vb_base), prot, vb->vb_flags));
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}
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}
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/* XXX Expansion ROM? */
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/*
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* Allow mmap access to the legacy ISA hole. This is where
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* the legacy video BIOS will be located, and also where
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* the legacy VGA display buffer is located.
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*
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* XXX Security implications, here?
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*/
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if (offset >= IOM_BEGIN && offset < IOM_END)
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return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN,
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(offset - IOM_BEGIN), prot, 0));
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/* Range not found. */
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return (-1);
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}
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