89 lines
2.9 KiB
C
89 lines
2.9 KiB
C
/* $NetBSD: pcb.h,v 1.8 2001/04/20 00:10:18 thorpej Exp $ */
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/*
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* Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/lock.h>
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#include <machine/frame.h>
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#include <machine/reg.h>
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#include <machine/alpha_cpu.h>
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/*
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* PCB: process control block
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*
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* In this case, the hardware structure that is the defining element
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* for a process, and the additional state that must be saved by software
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* on a context switch. Fields marked [HW] are mandated by hardware; fields
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* marked [SW] are for the software.
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*
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* It's said in the VMS PALcode section of the AARM that the pcb address
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* passed to the swpctx PALcode call has to be a physical address. Not
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* knowing this (and trying a virtual) address proved this correct.
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* So we cache the physical address of the pcb in the md_proc struct.
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*/
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struct pcb {
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struct alpha_pcb pcb_hw; /* PALcode defined */
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unsigned long pcb_context[9]; /* s[0-6], ra, ps [SW] */
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struct fpreg pcb_fp; /* FP registers [SW] */
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unsigned long pcb_onfault; /* for copy faults [SW] */
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unsigned long pcb_accessaddr; /* for [fs]uswintr [SW] */
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struct cpu_info * __volatile pcb_fpcpu; /* CPU with our FP state[SW] */
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struct simplelock pcb_fpcpu_slock; /* simple lock on fpcpu [SW] */
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};
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#if defined(MULTIPROCESSOR)
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/*
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* Need to block IPIs while holding the fpcpu_slock.
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*/
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#define FPCPU_LOCK(pcb, s) \
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do { \
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(s) = splhigh(); \
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simple_lock(&(pcb)->pcb_fpcpu_slock); \
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} while (/*CONSTCOND*/0)
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#define FPCPU_UNLOCK(pcb, s) \
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do { \
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simple_unlock(&(pcb)->pcb_fpcpu_slock); \
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splx((s)); \
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} while (/*CONSTCOND*/0)
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#else
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#define FPCPU_LOCK(pcb, s) simple_lock(&(pcb)->pcb_fpcpu_slock)
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#define FPCPU_UNLOCK(pcb, s) simple_unlock(&(pcb)->pcb_fpcpu_slock)
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#endif /* MULTIPROCESSOR */
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/*
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* The pcb is augmented with machine-dependent additional data for
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* core dumps. For the Alpha, that's a trap frame and the floating
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* point registers.
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*/
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struct md_coredump {
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struct trapframe md_tf;
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struct fpreg md_fpstate;
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};
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