NetBSD/sys/arch/arm32/iomd
mark 81f6df323e *Major* rewrite, long overdue.
The irq delivery code has been rewritten. On entry to the irq vector the
processor is switched to SVC32 mode so all interrupt routines now run
in SVC32 mode rather than IRQ32 mode. This fixes lots of irq re-enabling
problems.
Interrupt latency times are now vastly improved for high priority interrupts.
Cleaned up calling ast() before returning to USR32 mode (don't need to
mess about with trapframe copying.
Cleaned up all the comments and sorted out their indentation.
Rewritten the soft interrupt delivery code.
Added generic ARM7500 support rather than just RC7500 support.
1996-10-15 23:20:40 +00:00
..
iomd_clock.c Idented comments correctly. 1996-10-15 21:35:23 +00:00
iomd_fiq.S Rewritten floppy_read_fiq() and floppy_write_fiq() routines. 1996-05-06 00:21:05 +00:00
iomd_irq.S *Major* rewrite, long overdue. 1996-10-15 23:20:40 +00:00
iomd_irqhandler.c *Major* rewrite, long overdue. 1996-10-15 23:20:40 +00:00
iomdreg.h Updated with more info on the ARM7500 IOC/IOMD. 1996-08-21 20:00:50 +00:00