231 lines
6.0 KiB
C
231 lines
6.0 KiB
C
/* $NetBSD: isa_milan.c,v 1.14 2009/03/18 10:22:25 cegger Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Leo Weppelman.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: isa_milan.c,v 1.14 2009/03/18 10:22:25 cegger Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isareg.h>
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#include <machine/iomap.h>
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void isa_bus_init(void);
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static void new_imask(void);
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static void isa_callback(int);
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/*
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* Bitmask of currently enabled isa interrupts. Used by new_imask().
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*/
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static u_int16_t imask_enable = 0xffff;
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#define IRQ_SLAVE 2 /* Slave at level 2 */
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#define MILAN_MAX_ISA_INTS 16 /* Max. number of vectors */
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#define ICU_OFFSET 0 /* Interrupt vector base */
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#define WICU(icu, val) *(volatile u_int8_t*)(icu) = val
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static isa_intr_info_t milan_isa_iinfo[MILAN_MAX_ISA_INTS];
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void
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isa_bus_init(void)
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{
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volatile u_int8_t *icu;
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/*
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* Initialize both the icu's:
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* - enter Special Mask Mode
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* - Block all interrupts
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*/
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icu = (u_int8_t*)(AD_8259_MASTER);
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icu[0] = 0x11; /* reset; program device, four bytes */
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icu[1] = ICU_OFFSET; /* starting at this vector index */
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icu[1] = (1 << IRQ_SLAVE); /* slave on line 2 */
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icu[1] = 1; /* 8086 mode */
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icu[1] = 0xff; /* leave interrupts masked */
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icu[0] = 0x68; /* special mask mode */
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icu[0] = 0x0a; /* Read IRR by default. */
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icu = (u_int8_t*)(AD_8259_SLAVE);
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icu[0] = 0x11; /* reset; program device, four bytes */
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icu[1] = ICU_OFFSET + 8; /* starting at this vector index */
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icu[1] = IRQ_SLAVE; /* slave on line 2 */
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icu[1] = 1; /* 8086 mode */
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icu[1] = 0xff; /* leave interrupts masked */
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icu[0] = 0x68; /* special mask mode */
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icu[0] = 0x0a; /* Read IRR by default. */
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}
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/*
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* Determine and activate new interrupt mask by scanning the milan_isa_iinfo
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* array for enabled interrupts.
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*/
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static void
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new_imask(void)
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{
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int irq;
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u_int16_t nmask = 0;
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for (irq = 0; irq < MILAN_MAX_ISA_INTS; irq++) {
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if (milan_isa_iinfo[irq].ifunc != NULL)
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nmask |= 1 << irq;
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if (nmask >= 0x100)
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nmask |= 1 << IRQ_SLAVE;
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}
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imask_enable = ~nmask;
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WICU(AD_8259_MASTER+1, imask_enable & 0xff);
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WICU(AD_8259_SLAVE+1 , (imask_enable >> 8) & 0xff);
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}
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static void
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isa_callback(int vector)
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{
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isa_intr_info_t *iinfo_p;
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int s;
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iinfo_p = &milan_isa_iinfo[vector];
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s = splx(iinfo_p->ipl);
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(void) (iinfo_p->ifunc)(iinfo_p->iarg);
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if (vector > 7)
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WICU(AD_8259_SLAVE, 0x60 | (vector & 7));
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else WICU(AD_8259_MASTER, 0x60 | (vector & 7));
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splx(s);
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}
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void milan_isa_intr(int, int);
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void
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milan_isa_intr(int vector, int sr)
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{
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isa_intr_info_t *iinfo_p;
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int s;
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if (vector >= MILAN_MAX_ISA_INTS) {
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printf("milan_isa_intr: Bogus vector %d\n", vector);
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return;
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}
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/* Ack cascade 0x60 == Specific EOI */
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if (vector > 7)
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WICU(AD_8259_MASTER, 0x60|IRQ_SLAVE);
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iinfo_p = &milan_isa_iinfo[vector];
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if (iinfo_p->ifunc == NULL) {
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printf("milan_isa_intr: Stray interrupt: %d (mask:%04x)\n",
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vector, imask_enable);
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return;
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}
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if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
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/*
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* We're running at a too high priority now.
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*/
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add_sicallback((si_farg)isa_callback, (void*)vector, 0);
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}
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else {
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s = splx(iinfo_p->ipl);
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(void) (iinfo_p->ifunc)(iinfo_p->iarg);
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if (vector > 7)
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WICU(AD_8259_SLAVE, 0x60 | (vector & 7));
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else WICU(AD_8259_MASTER, 0x60 | (vector & 7));
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splx(s);
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}
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}
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/*
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* Try to allocate a free interrupt... On the Milan, we have available:
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* 5, 9, 10, 11, 13. Or in a bitmask: 0x1720.
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*/
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#define MILAN_AVAIL_ISA_INTS 0x1720
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int
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isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq)
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{
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int i;
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/*
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* Say no to impossible questions...
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*/
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if (!(mask &= MILAN_AVAIL_ISA_INTS))
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return 1;
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for (i = 0; i < MILAN_MAX_ISA_INTS; i++) {
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if (mask & (1<<i)) {
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if (milan_isa_iinfo[i].ifunc == NULL) {
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*irq = i;
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return 0;
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}
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}
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}
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return (1);
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}
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void *
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isa_intr_establish(isa_chipset_tag_t ic, int irq, int type, int level, int (*ih_fun)(void *), void *ih_arg)
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{
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isa_intr_info_t *iinfo_p;
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iinfo_p = &milan_isa_iinfo[irq];
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if (iinfo_p->ifunc != NULL) {
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printf("isa_intr_establish: interrupt %d was already "
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"established\n", irq);
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return NULL;
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}
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iinfo_p->slot = 0; /* Unused on Milan */
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iinfo_p->ihand = NULL; /* Unused on Milan */
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iinfo_p->ipl = level;
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iinfo_p->ifunc = ih_fun;
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iinfo_p->iarg = ih_arg;
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new_imask();
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return(iinfo_p);
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}
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void
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isa_intr_disestablish(isa_chipset_tag_t ic, void *handler)
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{
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isa_intr_info_t *iinfo_p = (isa_intr_info_t *)handler;
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if (iinfo_p->ifunc == NULL)
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panic("isa_intr_disestablish: interrupt was not established");
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iinfo_p->ifunc = NULL;
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new_imask();
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}
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