272 lines
7.3 KiB
C
272 lines
7.3 KiB
C
/* $NetBSD: isa_machdep.c,v 1.8 2003/08/07 16:29:20 agc Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)isa.c 7.2 (Berkeley) 5/13/91
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.8 2003/08/07 16:29:20 agc Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <machine/pio.h>
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#include <machine/intr.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#define IO_ELCR1 0x4d0
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#define IO_ELCR2 0x4d1
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const struct evcnt *
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isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
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{
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/* XXX for now, no evcnt parent reported */
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return NULL;
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}
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/*
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* Set up an interrupt handler to start being called.
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* XXX PRONE TO RACE CONDITIONS, UGLY, 'INTERESTING' INSERTION ALGORITHM.
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*/
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void *
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isa_intr_establish(ic, irq, type, level, ih_fun, ih_arg)
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isa_chipset_tag_t ic;
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int irq;
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int type;
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int level;
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int (*ih_fun) __P((void *));
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void *ih_arg;
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{
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return (void *)intr_establish(irq, type, level, ih_fun, ih_arg);
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}
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/*
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* Deregister an interrupt handler.
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*/
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void
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isa_intr_disestablish(ic, arg)
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isa_chipset_tag_t ic;
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void *arg;
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{
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intr_disestablish(arg);
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}
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void
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isa_attach_hook(parent, self, iba)
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struct device *parent, *self;
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struct isabus_attach_args *iba;
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{
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/* Nothing to do. */
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}
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int
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isa_intr(void)
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{
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int irq;
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isa_outb(IO_ICU1, 0x0c);
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irq = isa_inb(IO_ICU1) & 0x07;
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if (irq == IRQ_SLAVE) {
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isa_outb(IO_ICU2, 0x0c);
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irq = (isa_inb(IO_ICU2) & 0x07) + 8;
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}
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return (irq);
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}
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void
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isa_intr_mask(mask)
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int mask;
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{
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isa_outb(IO_ICU1+1, mask);
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isa_outb(IO_ICU2+1, mask >> 8);
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}
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void
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isa_intr_clr(irq)
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int irq;
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{
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if (irq < 8) {
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isa_outb(IO_ICU1, 0xe0 | irq);
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} else {
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isa_outb(IO_ICU2, 0xe0 | (irq & 7));
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isa_outb(IO_ICU1, 0xe0 | IRQ_SLAVE);
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}
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}
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/*
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* Initialize the Interrupt controller logic.
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*/
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void
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init_icu(int lvlmask)
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{
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int i;
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extern int intrtype[];
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for (i= 0; i < ICU_LEN; i++) {
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switch (i) {
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case 0:
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case 2:
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case 8:
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intrtype[i] = IST_EDGE;
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break;
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default:
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intrtype[i] = (1 << i) & lvlmask ? IST_LEVEL : IST_NONE;
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}
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}
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#ifdef DEBUG
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printf("old elcr = 0x%02x%02x, new = 0x%04x\n",
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isa_inb(IO_ELCR2), isa_inb(IO_ELCR1), lvlmask);
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#endif
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isa_outb(IO_ELCR1, (lvlmask >> 0) & 0xff);
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isa_outb(IO_ELCR2, (lvlmask >> 8) & 0xff);
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isa_outb(IO_ICU1, 0x11); /* program device, four bytes */
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isa_outb(IO_ICU1+1, 0); /* starting at this vector */
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isa_outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */
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isa_outb(IO_ICU1+1, 1); /* 8086 mode */
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isa_outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
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isa_outb(IO_ICU2, 0x11); /* program device, four bytes */
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isa_outb(IO_ICU2+1, 8); /* starting at this vector */
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isa_outb(IO_ICU2+1, IRQ_SLAVE);
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isa_outb(IO_ICU2+1, 1); /* 8086 mode */
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isa_outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
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}
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void
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isa_setirqstat(irq, enabled, type)
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int irq, enabled, type;
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{
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u_int8_t elcr[2];
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int icu, bit;
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icu = irq / 8;
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bit = irq % 8;
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elcr[0] = isa_inb(IO_ELCR1);
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elcr[1] = isa_inb(IO_ELCR2);
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if (type == IST_LEVEL)
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elcr[icu] |= 1 << bit;
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else
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elcr[icu] &= ~(1 << bit);
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isa_outb(IO_ELCR1, elcr[0]);
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isa_outb(IO_ELCR2, elcr[1]);
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}
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int
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isa_intr_alloc(isa_chipset_tag_t c, int mask, int type, int *irq_p)
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{
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int irq;
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int maybe_irq = -1;
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int shared_depth = 0;
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mask &= 0x8b28; /* choose from 3, 5, 8, 9, 11, 15 XXX */
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for (irq = 0; mask != 0; mask >>= 1, irq++) {
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if ((mask & 1) == 0)
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continue;
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if (intrtype[irq] == IST_NONE) {
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*irq_p = irq;
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return 0;
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}
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/* Level interrupts can be shared */
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if (type == IST_LEVEL && intrtype[irq] == IST_LEVEL) {
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struct intrhand *ih = intrhand[irq];
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int depth;
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if (maybe_irq == -1) {
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maybe_irq = irq;
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continue;
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}
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for (depth = 0; ih != NULL; ih = ih->ih_next)
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depth++;
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if (depth < shared_depth) {
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maybe_irq = irq;
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shared_depth = depth;
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}
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}
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}
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if (maybe_irq != -1) {
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*irq_p = maybe_irq;
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return 0;
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}
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return 1;
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}
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