bc3e11746b
and serial ports are supported, and the system appears stable with an NFS mounted root. An earlier version of the code was reviewed by simon@, but it has since had numerous improvements and cleanups. At the moment, only AR5312 is known to work, but I suspect AR2313 will work as well. Later 2315/2316 parts are substantially different, and are not yet supported. Wifi and Marvell switch support found on some designs are not yet supported. Platforms known to include AR5312 include Senao Aries 2 (AP5054) and Netgear WGU624.
122 lines
4.4 KiB
C
122 lines
4.4 KiB
C
/* $Id: ar531x_timer.c,v 1.1 2006/03/21 08:15:19 gdamore Exp $ */
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/*
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* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
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* Copyright (c) 2006 Garrett D'Amore.
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* All rights reserved.
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*
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* This code was written by Garrett D'Amore for the Champaign-Urbana
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* Community Wireless Network Project.
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* 3. All advertising materials mentioning features or use of this
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* software must display the following acknowledgements:
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* This product includes software developed by the Urbana-Champaign
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* Independent Media Center.
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* This product includes software developed by Garrett D'Amore.
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* 4. Urbana-Champaign Independent Media Center's name and Garrett
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* D'Amore's name may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ar531x_timer.c,v 1.1 2006/03/21 08:15:19 gdamore Exp $");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <mips/locore.h>
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#include <mips/atheros/include/ar531xreg.h>
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#include <mips/atheros/include/ar531xvar.h>
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void
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ar531x_cal_timer(void)
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{
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uint32_t wisoc = GETSYSREG(AR531X_SYSREG_REVISION);
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uint32_t predivmask;
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uint32_t predivshift;
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uint32_t multmask;
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uint32_t multshift;
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uint32_t doublermask;
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uint32_t divisor;
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uint32_t multiplier;
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uint32_t cpufreq;
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uint32_t clockctl;
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const int predivide_table[4] = { 1, 2, 4, 5 };
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/* XXX: in theory we might be able to get clock from bootrom */
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/*
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* This logic looks at the clock control register and
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* determines the actual CPU frequency. These parts lack any
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* kind of real-time clock on them, but the cpu clocks should
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* be very accurate -- WiFi requires usec resolution timers.
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*/
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if (AR531X_REVISION_MAJOR(wisoc) == AR531X_REVISION_MAJ_AR2313) {
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predivmask = AR2313_CLOCKCTL_PREDIVIDE_MASK;
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predivshift = AR2313_CLOCKCTL_PREDIVIDE_SHIFT;
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multmask = AR2313_CLOCKCTL_MULTIPLIER_MASK;
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multshift = AR2313_CLOCKCTL_MULTIPLIER_SHIFT;
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doublermask = AR2313_CLOCKCTL_DOUBLER_MASK;
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} else {
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predivmask = AR5312_CLOCKCTL_PREDIVIDE_MASK;
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predivshift = AR5312_CLOCKCTL_PREDIVIDE_SHIFT;
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multmask = AR5312_CLOCKCTL_MULTIPLIER_MASK;
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multshift = AR5312_CLOCKCTL_MULTIPLIER_SHIFT;
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doublermask = AR5312_CLOCKCTL_DOUBLER_MASK;
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}
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clockctl = GETSYSREG(AR531X_SYSREG_CLOCKCTL);
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divisor = predivide_table[(clockctl & predivmask) >> predivshift];
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multiplier = (clockctl & multmask) >> multshift;
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if (clockctl & doublermask)
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multiplier <<= 1;
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cpufreq = (40000000 / divisor) * multiplier;
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/* MIPS 4Kc CP0 counts every other clock */
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if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
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cpufreq /= 2;
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curcpu()->ci_cycles_per_hz = (cpufreq + hz / 2) / hz;
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/* XXX: i don't understand this logic, it was borrowed from Malta */
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curcpu()->ci_divisor_delay = ((cpufreq + 500000) / 1000000);
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MIPS_SET_CI_RECIPRICAL(curcpu());
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/*
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* Get correct cpu frequency if the CPU runs at twice the
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* external/cp0-count frequency.
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*/
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curcpu()->ci_cpu_freq = cpufreq;
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if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
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curcpu()->ci_cpu_freq *= 2;
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}
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