0ce3451d1f
Lots of the work was done by Adam Ciarcinsky. Currently, this only supports CyberPPC boards by Phase 5. Blizzard PPC expected later. The kernel is useless but for demonstrating that it starts... especially interupts, and most of MMU support, is not in yet. Builtin console works, however, and you can look at the kernel startup messages.
93 lines
3.2 KiB
C
93 lines
3.2 KiB
C
/* $NetBSD: conf.h,v 1.1 2000/05/25 22:11:59 is Exp $ */
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/*
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* Copyright (c) 1996 Bernd Ernesti. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bernd Ernesti.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#define mmread mmrw
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#define mmwrite mmrw
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cdev_decl(mm);
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cdev_decl(ctty);
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bdev_decl(fd);
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cdev_decl(fd);
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/* open, close, ioctl, poll, mmap -- XXX should be a map device */
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#define cdev_grf_init(c,n) { \
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dev_init(c,n,open), dev_init(c,n,close), (dev_type_read((*))) nullop, \
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(dev_type_write((*))) nullop, dev_init(c,n,ioctl), \
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(dev_type_stop((*))) enodev, 0, dev_init(c,n,poll), \
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dev_init(c,n,mmap) }
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/* open, close, ioctl, poll, mmap -- XXX should be a map device */
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#define cdev_view_init(c,n) { \
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dev_init(c,n,open), dev_init(c,n,close), (dev_type_read((*))) nullop, \
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(dev_type_write((*))) nullop, dev_init(c,n,ioctl), \
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(dev_type_stop((*))) enodev, 0, dev_init(c,n,poll), \
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dev_init(c,n,mmap) }
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/* open, close, read, write, ioctl -- XXX should be a generic device */
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#define cdev_par_init(c,n) { \
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dev_init(c,n,open), dev_init(c,n,close), dev_init(c,n,read), \
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dev_init(c,n,write), dev_init(c,n,ioctl), (dev_type_stop((*))) enodev, \
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0, (dev_type_poll((*))) enodev, (dev_type_mmap((*))) enodev }
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/* open, close, write, ioctl -- XXX should be a generic device */
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#define cdev_lpt_init(c,n) { \
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dev_init(c,n,open), dev_init(c,n,close), (dev_type_read((*))) enodev, \
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dev_init(c,n,write), dev_init(c,n,ioctl), (dev_type_stop((*))) enodev, \
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0, (dev_type_poll((*))) enodev, (dev_type_mmap((*))) enodev }
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cdev_decl(ms);
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cdev_decl(grf);
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cdev_decl(kbd);
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cdev_decl(ite);
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cdev_decl(par);
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cdev_decl(ser);
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cdev_decl(msc);
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cdev_decl(mfcs);
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cdev_decl(com);
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cdev_decl(lpt);
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cdev_decl(view);
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bdev_decl(sw);
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cdev_decl(sw);
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cdev_decl(scsibus);
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