115 lines
3.7 KiB
C
115 lines
3.7 KiB
C
/* $NetBSD: tmureg.h,v 1.9 2005/07/03 12:38:38 nonaka Exp $ */
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/*-
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* Copyright (C) 1999 SAITOH Masanobu. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SH3_TMUREG_H_
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#define _SH3_TMUREG_H_
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#include <sh3/devreg.h>
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/*
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* TMU
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*/
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#define SH3_TOCR 0xfffffe90
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#define SH3_TSTR 0xfffffe92
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#define SH3_TCOR0 0xfffffe94
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#define SH3_TCNT0 0xfffffe98
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#define SH3_TCR0 0xfffffe9c
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#define SH3_TCOR1 0xfffffea0
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#define SH3_TCNT1 0xfffffea4
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#define SH3_TCR1 0xfffffea8
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#define SH3_TCOR2 0xfffffeac
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#define SH3_TCNT2 0xfffffeb0
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#define SH3_TCR2 0xfffffeb4
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#define SH3_TCPR2 0xfffffeb8
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#define SH4_TOCR 0xffd80000
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#define SH4_TSTR 0xffd80004
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#define SH4_TCOR0 0xffd80008
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#define SH4_TCNT0 0xffd8000c
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#define SH4_TCR0 0xffd80010
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#define SH4_TCOR1 0xffd80014
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#define SH4_TCNT1 0xffd80018
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#define SH4_TCR1 0xffd8001c
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#define SH4_TCOR2 0xffd80020
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#define SH4_TCNT2 0xffd80024
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#define SH4_TCR2 0xffd80028
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#define SH4_TCPR2 0xffd8002c
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#define SH4_TSTR2 0xfe100004
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#define SH4_TCOR3 0xfe100008
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#define SH4_TCNT3 0xfe10000c
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#define SH4_TCR3 0xfe100010
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#define SH4_TCOR4 0xfe100014
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#define SH4_TCNT4 0xfe100018
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#define SH4_TCR4 0xfe10001c
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#define TOCR_TCOE 0x01
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#define TSTR_STR2 0x04
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#define TSTR_STR1 0x02
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#define TSTR_STR0 0x01
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#define TCR_ICPF 0x0200
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#define TCR_UNF 0x0100
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#define TCR_ICPE1 0x0080
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#define TCR_ICPE0 0x0040
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#define TCR_UNIE 0x0020
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#define TCR_CKEG1 0x0010
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#define TCR_CKEG0 0x0008
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#define TCR_TPSC2 0x0004
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#define TCR_TPSC1 0x0002
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#define TCR_TPSC0 0x0001
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#define TCR_TPSC_P4 0x0000
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#define TCR_TPSC_P16 0x0001
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#define TCR_TPSC_P64 0x0002
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#define TCR_TPSC_P256 0x0003
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#define SH3_TCR_TPSC_RTC 0x0004
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#define SH3_TCR_TPSC_TCLK 0x0005
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#define SH4_TCR_TPSC_P1024 0x0004
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#define SH4_TCR_TPSC_RTC 0x0006
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#define SH4_TCR_TPSC_TCLK 0x0007
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#define SH4_TSTR2_STR4 0x02
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#define SH4_TSTR2_STR3 0x01
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#ifndef _LOCORE
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#if defined(SH3) && defined(SH4)
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extern u_int32_t __sh_TOCR;
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extern u_int32_t __sh_TSTR;
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extern u_int32_t __sh_TCOR0;
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extern u_int32_t __sh_TCNT0;
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extern u_int32_t __sh_TCR0;
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extern u_int32_t __sh_TCOR1;
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extern u_int32_t __sh_TCNT1;
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extern u_int32_t __sh_TCR1;
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extern u_int32_t __sh_TCOR2;
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extern u_int32_t __sh_TCNT2;
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extern u_int32_t __sh_TCR2;
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extern u_int32_t __sh_TCPR2;
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#endif /* SH3 && SH4 */
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#endif /* !_LOCORE */
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#endif /* !_SH3_TMUREG_H_ */
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