176 lines
4.7 KiB
C
176 lines
4.7 KiB
C
/* $NetBSD: mcpcia_pci.c,v 1.3 1998/05/05 22:01:54 mjacob Exp $ */
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/*
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* Copyright (c) 1998 by Matthew Jacob
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* NASA AMES Research Center.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: mcpcia_pci.c,v 1.3 1998/05/05 22:01:54 mjacob Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <alpha/pci/mcpciareg.h>
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#include <alpha/pci/mcpciavar.h>
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#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
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static void mcpcia_attach_hook __P((struct device *, struct device *,
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struct pcibus_attach_args *));
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static int
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mcpcia_bus_maxdevs __P((void *, int));
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static pcitag_t
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mcpcia_make_tag __P((void *, int, int, int));
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static void
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mcpcia_decompose_tag __P((void *, pcitag_t, int *, int *, int *));
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static pcireg_t
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mcpcia_conf_read __P((void *, pcitag_t, int));
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static void
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mcpcia_conf_write __P((void *, pcitag_t, int, pcireg_t));
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void
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mcpcia_pci_init(pc, v)
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pci_chipset_tag_t pc;
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void *v;
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{
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pc->pc_conf_v = v;
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pc->pc_attach_hook = mcpcia_attach_hook;
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pc->pc_bus_maxdevs = mcpcia_bus_maxdevs;
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pc->pc_make_tag = mcpcia_make_tag;
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pc->pc_decompose_tag = mcpcia_decompose_tag;
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pc->pc_conf_read = mcpcia_conf_read;
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pc->pc_conf_write = mcpcia_conf_write;
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}
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static void
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mcpcia_attach_hook(parent, self, pba)
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struct device *parent, *self;
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struct pcibus_attach_args *pba;
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{
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}
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static int
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mcpcia_bus_maxdevs(cpv, busno)
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void *cpv;
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int busno;
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{
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return (MCPCIA_MAXDEV);
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}
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static pcitag_t
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mcpcia_make_tag(cpv, b, d, f)
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void *cpv;
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int b, d, f;
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{
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pcitag_t tag;
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tag = (b << 21) | (d << 16) | (f << 13);
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return (tag);
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}
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static void
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mcpcia_decompose_tag(cpv, tag, bp, dp, fp)
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void *cpv;
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pcitag_t tag;
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int *bp, *dp, *fp;
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{
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if (bp != NULL)
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*bp = (tag >> 21) & 0xff;
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if (dp != NULL)
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*dp = (tag >> 16) & 0x1f;
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if (fp != NULL)
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*fp = (tag >> 13) & 0x7;
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}
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static pcireg_t
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mcpcia_conf_read(cpv, tag, offset)
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void *cpv;
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pcitag_t tag;
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int offset;
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{
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struct mcpcia_config *ccp = cpv;
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pcireg_t *dp, data = (pcireg_t) -1;
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unsigned long paddr;
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/*
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* There's nothing in slot 0 on a primary bus- don't even try.
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*/
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if ((tag >> 21) == 0 && ((u_int32_t) tag & 0x1f0000) == 0)
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return (data);
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if (ccp == NULL) {
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panic("NULL ccp in mcpcia_conf_read");
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}
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paddr = (unsigned long) tag;
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paddr |= (3LL << 3); /* 32 Bit PCI byte enables */
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paddr |= ((unsigned long) ((offset >> 2) << 7));
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paddr |= MCPCIA_PCI_CONF;
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paddr |= ccp->cc_sysbase;
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dp = (pcireg_t *)KV(paddr);
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if (badaddr(dp, sizeof (*dp)) == 0) {
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data = *dp;
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}
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return (data);
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}
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static void
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mcpcia_conf_write(cpv, tag, offset, data)
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void *cpv;
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pcitag_t tag;
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int offset;
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pcireg_t data;
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{
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struct mcpcia_config *ccp = cpv;
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pcireg_t *dp;
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unsigned long paddr;
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/*
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* There's nothing in slot 0 on a primary bus- don't even try.
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*/
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if ((tag >> 21) == 0 && ((u_int32_t) tag & 0x1f0000) == 0)
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return;
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if (ccp == NULL) {
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panic("NULL ccp in mcpcia_conf_write");
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}
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paddr = (unsigned long) tag;
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paddr |= (3LL << 3); /* 32 Bit PCI byte enables */
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paddr |= ((unsigned long) ((offset >> 2) << 7));
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paddr |= MCPCIA_PCI_CONF;
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paddr |= ccp->cc_sysbase;
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dp = (pcireg_t *)KV(paddr);
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*dp = data;
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}
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