512709b547
The et(4) driver supports PCI Express Ethernet adapters based on the Agere/LSI ET1310/ET1301 integrated MAC/PHY. The et(4) driver was written by Sepherosa Ziehau for DragonFlyBSD, ported to OpenBSD by Jonathan Gray and subsequently ported to NetBSD by Kaspar Brand.
350 lines
9.2 KiB
C
350 lines
9.2 KiB
C
/* $NetBSD: etphy.c,v 1.1 2010/11/13 00:47:24 jnemeth Exp $ */
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/* $OpenBSD: etphy.c,v 1.4 2008/04/02 20:12:58 brad Exp $ */
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/*
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* Copyright (c) 2007 The DragonFly Project. All rights reserved.
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*
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* This code is derived from software contributed to The DragonFly Project
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* by Sepherosa Ziehau <sepherosa@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name of The DragonFly Project nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific, prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $DragonFly: src/sys/dev/netif/mii_layer/truephy.c,v 1.1 2007/10/12 14:12:42 sephe Exp $
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: etphy.c,v 1.1 2010/11/13 00:47:24 jnemeth Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/miidevs.h>
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#define ETPHY_INDEX 0x10 /* XXX reserved in DS */
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#define ETPHY_INDEX_MAGIC 0x402
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#define ETPHY_DATA 0x11 /* XXX reserved in DS */
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#define ETPHY_CTRL 0x12
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#define ETPHY_CTRL_DIAG 0x0004
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#define ETPHY_CTRL_RSV1 0x0002 /* XXX reserved */
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#define ETPHY_CTRL_RSV0 0x0001 /* XXX reserved */
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#define ETPHY_CONF 0x16
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#define ETPHY_CONF_TXFIFO_MASK 0x3000
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#define ETPHY_CONF_TXFIFO_8 0x0000
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#define ETPHY_CONF_TXFIFO_16 0x1000
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#define ETPHY_CONF_TXFIFO_24 0x2000
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#define ETPHY_CONF_TXFIFO_32 0x3000
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#define ETPHY_SR 0x1a
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#define ETPHY_SR_SPD_MASK 0x0300
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#define ETPHY_SR_SPD_1000T 0x0200
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#define ETPHY_SR_SPD_100TX 0x0100
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#define ETPHY_SR_SPD_10T 0x0000
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#define ETPHY_SR_FDX 0x0080
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int etphy_service(struct mii_softc *, struct mii_data *, int);
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void etphy_attach(device_t, device_t, void *);
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int etphy_match(device_t, cfdata_t, void *);
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void etphy_reset(struct mii_softc *);
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void etphy_status(struct mii_softc *);
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const struct mii_phy_funcs etphy_funcs = {
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etphy_service, etphy_status, etphy_reset,
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};
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static const struct mii_phydesc etphys[] = {
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{ MII_OUI_AGERE, MII_MODEL_AGERE_ET1011,
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MII_STR_AGERE_ET1011 },
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{ 0, 0,
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NULL },
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};
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CFATTACH_DECL_NEW(etphy, sizeof(struct mii_softc),
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etphy_match, etphy_attach, mii_phy_detach, mii_phy_activate);
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static const struct etphy_dsp {
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uint16_t index;
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uint16_t data;
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} etphy_dspcode[] = {
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{ 0x880b, 0x0926 }, /* AfeIfCreg4B1000Msbs */
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{ 0x880c, 0x0926 }, /* AfeIfCreg4B100Msbs */
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{ 0x880d, 0x0926 }, /* AfeIfCreg4B10Msbs */
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{ 0x880e, 0xb4d3 }, /* AfeIfCreg4B1000Lsbs */
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{ 0x880f, 0xb4d3 }, /* AfeIfCreg4B100Lsbs */
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{ 0x8810, 0xb4d3 }, /* AfeIfCreg4B10Lsbs */
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{ 0x8805, 0xb03e }, /* AfeIfCreg3B1000Msbs */
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{ 0x8806, 0xb03e }, /* AfeIfCreg3B100Msbs */
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{ 0x8807, 0xff00 }, /* AfeIfCreg3B10Msbs */
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{ 0x8808, 0xe090 }, /* AfeIfCreg3B1000Lsbs */
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{ 0x8809, 0xe110 }, /* AfeIfCreg3B100Lsbs */
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{ 0x880a, 0x0000 }, /* AfeIfCreg3B10Lsbs */
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{ 0x300d, 1 }, /* DisableNorm */
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{ 0x280c, 0x0180 }, /* LinkHoldEnd */
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{ 0x1c21, 0x0002 }, /* AlphaM */
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{ 0x3821, 6 }, /* FfeLkgTx0 */
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{ 0x381d, 1 }, /* FfeLkg1g4 */
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{ 0x381e, 1 }, /* FfeLkg1g5 */
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{ 0x381f, 1 }, /* FfeLkg1g6 */
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{ 0x3820, 1 }, /* FfeLkg1g7 */
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{ 0x8402, 0x01f0 }, /* Btinact */
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{ 0x800e, 20 }, /* LftrainTime */
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{ 0x800f, 24 }, /* DvguardTime */
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{ 0x8010, 46 } /* IdlguardTime */
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};
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int
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etphy_match(device_t parent, cfdata_t match, void *aux)
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{
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struct mii_attach_args *ma = aux;
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if (mii_phy_match(ma, etphys) != NULL)
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return 10;
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return 0;
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}
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void
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etphy_attach(device_t parent, device_t self, void *aux)
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{
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struct mii_softc *sc = device_private(self);
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struct mii_attach_args *ma = aux;
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struct mii_data *mii = ma->mii_data;
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const struct mii_phydesc *mpd;
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mpd = mii_phy_match(ma, etphys);
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aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
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sc->mii_dev = self;
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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sc->mii_funcs = &etphy_funcs;
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sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
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sc->mii_pdata = mii;
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sc->mii_flags = ma->mii_flags;
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sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOLOOP;
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PHY_RESET(sc);
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sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
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if (sc->mii_capabilities & BMSR_EXTSTAT) {
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sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
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/* No 1000baseT half-duplex support */
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sc->mii_extcapabilities &= ~EXTSR_1000THDX;
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}
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aprint_normal_dev(self, "");
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if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
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aprint_error("no media present");
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else
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mii_phy_add_media(sc);
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aprint_normal("\n");
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if (!pmf_device_register(self, NULL, mii_phy_resume))
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aprint_error_dev(self, "couldn't establish power handler\n");
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}
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int
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etphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int bmcr;
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switch (cmd) {
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case MII_POLLSTAT:
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/*
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* If we're not polling our PHY instance, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return 0;
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break;
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case MII_MEDIACHG:
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/*
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* If the media indicates a different PHY instance,
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* isolate ourselves.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
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bmcr = PHY_READ(sc, MII_BMCR);
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PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
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return 0;
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}
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/*
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* If the interface is not up, don't do anything.
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
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bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_AUTOEN;
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PHY_WRITE(sc, MII_BMCR, bmcr);
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PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);
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}
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mii_phy_setmedia(sc);
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if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
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bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN;
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PHY_WRITE(sc, MII_BMCR, bmcr);
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if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
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PHY_WRITE(sc, MII_BMCR,
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bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
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}
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}
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break;
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case MII_TICK:
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/*
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* If we're not currently selected, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return 0;
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if (mii_phy_tick(sc) == EJUSTRETURN)
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return 0;
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break;
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}
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/* Update the media status. */
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mii_phy_status(sc);
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return 0;
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}
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void
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etphy_reset(struct mii_softc *sc)
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{
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int i;
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for (i = 0; i < 2; ++i) {
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PHY_READ(sc, MII_PHYIDR1);
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PHY_READ(sc, MII_PHYIDR2);
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PHY_READ(sc, ETPHY_CTRL);
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PHY_WRITE(sc, ETPHY_CTRL,
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ETPHY_CTRL_DIAG | ETPHY_CTRL_RSV1);
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PHY_WRITE(sc, ETPHY_INDEX, ETPHY_INDEX_MAGIC);
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PHY_READ(sc, ETPHY_DATA);
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PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_RSV1);
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}
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PHY_READ(sc, MII_BMCR);
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PHY_READ(sc, ETPHY_CTRL);
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PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
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PHY_WRITE(sc, ETPHY_CTRL,
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ETPHY_CTRL_DIAG | ETPHY_CTRL_RSV1 | ETPHY_CTRL_RSV0);
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#define N(arr) (int)(sizeof(arr) / sizeof(arr[0]))
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for (i = 0; i < N(etphy_dspcode); ++i) {
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const struct etphy_dsp *dsp = &etphy_dspcode[i];
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PHY_WRITE(sc, ETPHY_INDEX, dsp->index);
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PHY_WRITE(sc, ETPHY_DATA, dsp->data);
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PHY_WRITE(sc, ETPHY_INDEX, dsp->index);
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PHY_READ(sc, ETPHY_DATA);
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}
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#undef N
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PHY_READ(sc, MII_BMCR);
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PHY_READ(sc, ETPHY_CTRL);
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PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000);
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PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_RSV1);
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mii_phy_reset(sc);
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}
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void
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etphy_status(struct mii_softc *sc)
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{
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struct mii_data *mii = sc->mii_pdata;
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int bmsr, bmcr, sr;
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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sr = PHY_READ(sc, ETPHY_SR);
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bmcr = PHY_READ(sc, MII_BMCR);
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bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
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if (bmsr & BMSR_LINK)
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mii->mii_media_status |= IFM_ACTIVE;
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if (bmcr & BMCR_AUTOEN) {
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if ((bmsr & BMSR_ACOMP) == 0) {
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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}
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switch (sr & ETPHY_SR_SPD_MASK) {
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case ETPHY_SR_SPD_1000T:
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mii->mii_media_active |= IFM_1000_T;
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break;
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case ETPHY_SR_SPD_100TX:
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mii->mii_media_active |= IFM_100_TX;
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break;
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case ETPHY_SR_SPD_10T:
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mii->mii_media_active |= IFM_10_T;
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break;
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default:
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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if (sr & ETPHY_SR_FDX)
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mii->mii_media_active |= IFM_FDX;
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else
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mii->mii_media_active |= IFM_HDX;
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}
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