443 lines
14 KiB
Plaintext
443 lines
14 KiB
Plaintext
@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000, 2003
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@c Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node M68HC11-Dependent
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@chapter M68HC11 and M68HC12 Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter M68HC11 and M68HC12 Dependent Features
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@end ifclear
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@cindex M68HC11 and M68HC12 support
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@menu
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* M68HC11-Opts:: M68HC11 and M68HC12 Options
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* M68HC11-Syntax:: Syntax
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* M68HC11-Modifiers:: Symbolic Operand Modifiers
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* M68HC11-Directives:: Assembler Directives
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* M68HC11-Float:: Floating Point
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* M68HC11-opcodes:: Opcodes
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@end menu
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@node M68HC11-Opts
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@section M68HC11 and M68HC12 Options
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@cindex options, M68HC11
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@cindex M68HC11 options
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The Motorola 68HC11 and 68HC12 version of @code{@value{AS}} have a few machine
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dependent options.
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@table @code
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@cindex @samp{-m68hc11}
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@item -m68hc11
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This option switches the assembler in the M68HC11 mode. In this mode,
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the assembler only accepts 68HC11 operands and mnemonics. It produces
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code for the 68HC11.
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@cindex @samp{-m68hc12}
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@item -m68hc12
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This option switches the assembler in the M68HC12 mode. In this mode,
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the assembler also accepts 68HC12 operands and mnemonics. It produces
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code for the 68HC12. A few 68HC11 instructions are replaced by
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some 68HC12 instructions as recommended by Motorola specifications.
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@cindex @samp{-m68hcs12}
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@item -m68hcs12
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This option switches the assembler in the M68HCS12 mode. This mode is
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similar to @samp{-m68hc12} but specifies to assemble for the 68HCS12
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series. The only difference is on the assembling of the @samp{movb}
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and @samp{movw} instruction when a PC-relative operand is used.
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@cindex @samp{-mshort}
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@item -mshort
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This option controls the ABI and indicates to use a 16-bit integer ABI.
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It has no effect on the assembled instructions.
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This is the default.
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@cindex @samp{-mlong}
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@item -mlong
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This option controls the ABI and indicates to use a 32-bit integer ABI.
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@cindex @samp{-mshort-double}
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@item -mshort-double
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This option controls the ABI and indicates to use a 32-bit float ABI.
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This is the default.
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@cindex @samp{-mlong-double}
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@item -mlong-double
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This option controls the ABI and indicates to use a 64-bit float ABI.
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@cindex @samp{--strict-direct-mode}
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@item --strict-direct-mode
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You can use the @samp{--strict-direct-mode} option to disable
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the automatic translation of direct page mode addressing into
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extended mode when the instruction does not support direct mode.
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For example, the @samp{clr} instruction does not support direct page
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mode addressing. When it is used with the direct page mode,
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@code{@value{AS}} will ignore it and generate an absolute addressing.
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This option prevents @code{@value{AS}} from doing this, and the wrong
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usage of the direct page mode will raise an error.
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@cindex @samp{--short-branchs}
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@item --short-branchs
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The @samp{--short-branchs} option turns off the translation of
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relative branches into absolute branches when the branch offset is
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out of range. By default @code{@value{AS}} transforms the relative
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branch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne},
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@samp{ble}, @samp{blt}, @samp{bhi}, @samp{bcc}, @samp{bls},
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@samp{bcs}, @samp{bmi}, @samp{bvs}, @samp{bvs}, @samp{bra}) into
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an absolute branch when the offset is out of the -128 .. 127 range.
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In that case, the @samp{bsr} instruction is translated into a
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@samp{jsr}, the @samp{bra} instruction is translated into a
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@samp{jmp} and the conditional branchs instructions are inverted and
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followed by a @samp{jmp}. This option disables these translations
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and @code{@value{AS}} will generate an error if a relative branch
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is out of range. This option does not affect the optimization
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associated to the @samp{jbra}, @samp{jbsr} and @samp{jbXX} pseudo opcodes.
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@cindex @samp{--force-long-branchs}
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@item --force-long-branchs
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The @samp{--force-long-branchs} option forces the translation of
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relative branches into absolute branches. This option does not affect
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the optimization associated to the @samp{jbra}, @samp{jbsr} and
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@samp{jbXX} pseudo opcodes.
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@cindex @samp{--print-insn-syntax}
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@item --print-insn-syntax
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You can use the @samp{--print-insn-syntax} option to obtain the
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syntax description of the instruction when an error is detected.
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@cindex @samp{--print-opcodes}
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@item --print-opcodes
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The @samp{--print-opcodes} option prints the list of all the
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instructions with their syntax. The first item of each line
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represents the instruction name and the rest of the line indicates
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the possible operands for that instruction. The list is printed
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in alphabetical order. Once the list is printed @code{@value{AS}}
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exits.
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@cindex @samp{--generate-example}
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@item --generate-example
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The @samp{--generate-example} option is similar to @samp{--print-opcodes}
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but it generates an example for each instruction instead.
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@end table
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@node M68HC11-Syntax
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@section Syntax
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@cindex M68HC11 syntax
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@cindex syntax, M68HC11
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In the M68HC11 syntax, the instruction name comes first and it may
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be followed by one or several operands (up to three). Operands are
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separated by comma (@samp{,}). In the normal mode,
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@code{@value{AS}} will complain if too many operands are specified for
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a given instruction. In the MRI mode (turned on with @samp{-M} option),
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it will treat them as comments. Example:
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@smallexample
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inx
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lda #23
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bset 2,x #4
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brclr *bot #8 foo
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@end smallexample
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@cindex M68HC11 addressing modes
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@cindex addressing modes, M68HC11
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The following addressing modes are understood for 68HC11 and 68HC12:
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@table @dfn
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@item Immediate
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@samp{#@var{number}}
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@item Address Register
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@samp{@var{number},X}, @samp{@var{number},Y}
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The @var{number} may be omitted in which case 0 is assumed.
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@item Direct Addressing mode
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@samp{*@var{symbol}}, or @samp{*@var{digits}}
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@item Absolute
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@samp{@var{symbol}}, or @samp{@var{digits}}
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@end table
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The M68HC12 has other more complex addressing modes. All of them
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are supported and they are represented below:
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@table @dfn
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@item Constant Offset Indexed Addressing Mode
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@samp{@var{number},@var{reg}}
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The @var{number} may be omitted in which case 0 is assumed.
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The register can be either @samp{X}, @samp{Y}, @samp{SP} or
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@samp{PC}. The assembler will use the smaller post-byte definition
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according to the constant value (5-bit constant offset, 9-bit constant
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offset or 16-bit constant offset). If the constant is not known by
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the assembler it will use the 16-bit constant offset post-byte and the value
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will be resolved at link time.
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@item Offset Indexed Indirect
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@samp{[@var{number},@var{reg}]}
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The register can be either @samp{X}, @samp{Y}, @samp{SP} or @samp{PC}.
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@item Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement
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@samp{@var{number},-@var{reg}}
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@samp{@var{number},+@var{reg}}
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@samp{@var{number},@var{reg}-}
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@samp{@var{number},@var{reg}+}
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The number must be in the range @samp{-8}..@samp{+8} and must not be 0.
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The register can be either @samp{X}, @samp{Y}, @samp{SP} or @samp{PC}.
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@item Accumulator Offset
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@samp{@var{acc},@var{reg}}
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The accumulator register can be either @samp{A}, @samp{B} or @samp{D}.
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The register can be either @samp{X}, @samp{Y}, @samp{SP} or @samp{PC}.
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@item Accumulator D offset indexed-indirect
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@samp{[D,@var{reg}]}
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The register can be either @samp{X}, @samp{Y}, @samp{SP} or @samp{PC}.
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@end table
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For example:
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@smallexample
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ldab 1024,sp
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ldd [10,x]
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orab 3,+x
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stab -2,y-
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ldx a,pc
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sty [d,sp]
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@end smallexample
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@node M68HC11-Modifiers
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@section Symbolic Operand Modifiers
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@cindex M68HC11 modifiers
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@cindex syntax, M68HC11
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The assembler supports several modifiers when using symbol addresses
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in 68HC11 and 68HC12 instruction operands. The general syntax is
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the following:
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@smallexample
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%modifier(symbol)
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@end smallexample
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@table @code
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@cindex symbol modifiers
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@item %addr
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This modifier indicates to the assembler and linker to use
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the 16-bit physical address corresponding to the symbol. This is intended
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to be used on memory window systems to map a symbol in the memory bank window.
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If the symbol is in a memory expansion part, the physical address
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corresponds to the symbol address within the memory bank window.
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If the symbol is not in a memory expansion part, this is the symbol address
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(using or not using the %addr modifier has no effect in that case).
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@item %page
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This modifier indicates to use the memory page number corresponding
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to the symbol. If the symbol is in a memory expansion part, its page
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number is computed by the linker as a number used to map the page containing
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the symbol in the memory bank window. If the symbol is not in a memory
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expansion part, the page number is 0.
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@item %hi
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This modifier indicates to use the 8-bit high part of the physical
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address of the symbol.
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@item %lo
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This modifier indicates to use the 8-bit low part of the physical
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address of the symbol.
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@end table
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For example a 68HC12 call to a function @samp{foo_example} stored in memory
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expansion part could be written as follows:
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@smallexample
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call %addr(foo_example),%page(foo_example)
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@end smallexample
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and this is equivalent to
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@smallexample
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call foo_example
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@end smallexample
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And for 68HC11 it could be written as follows:
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@smallexample
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ldab #%page(foo_example)
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stab _page_switch
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jsr %addr(foo_example)
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@end smallexample
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@node M68HC11-Directives
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@section Assembler Directives
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@cindex assembler directives, M68HC11
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@cindex assembler directives, M68HC12
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@cindex M68HC11 assembler directives
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@cindex M68HC12 assembler directives
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The 68HC11 and 68HC12 version of @code{@value{AS}} have the following
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specific assembler directives:
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@table @code
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@item .relax
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@cindex assembler directive .relax, M68HC11
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@cindex M68HC11 assembler directive .relax
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The relax directive is used by the @samp{GNU Compiler} to emit a specific
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relocation to mark a group of instructions for linker relaxation.
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The sequence of instructions within the group must be known to the linker
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so that relaxation can be performed.
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@item .mode [mshort|mlong|mshort-double|mlong-double]
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@cindex assembler directive .mode, M68HC11
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@cindex M68HC11 assembler directive .mode
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This directive specifies the ABI. It overrides the @samp{-mshort},
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@samp{-mlong}, @samp{-mshort-double} and @samp{-mlong-double} options.
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@item .far @var{symbol}
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@cindex assembler directive .far, M68HC11
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@cindex M68HC11 assembler directive .far
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This directive marks the symbol as a @samp{far} symbol meaning that it
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uses a @samp{call/rtc} calling convention as opposed to @samp{jsr/rts}.
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During a final link, the linker will identify references to the @samp{far}
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symbol and will verify the proper calling convention.
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@item .interrupt @var{symbol}
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@cindex assembler directive .interrupt, M68HC11
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@cindex M68HC11 assembler directive .interrupt
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This directive marks the symbol as an interrupt entry point.
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This information is then used by the debugger to correctly unwind the
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frame across interrupts.
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@item .xrefb @var{symbol}
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@cindex assembler directive .xrefb, M68HC11
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@cindex M68HC11 assembler directive .xrefb
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This directive is defined for compatibility with the
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@samp{Specification for Motorola 8 and 16-Bit Assembly Language Input
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Standard} and is ignored.
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@end table
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@node M68HC11-Float
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@section Floating Point
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@cindex floating point, M68HC11
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@cindex M68HC11 floating point
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Packed decimal (P) format floating literals are not supported.
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Feel free to add the code!
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The floating point formats generated by directives are these.
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@table @code
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@cindex @code{float} directive, M68HC11
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@item .float
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@code{Single} precision floating point constants.
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@cindex @code{double} directive, M68HC11
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@item .double
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@code{Double} precision floating point constants.
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@cindex @code{extend} directive M68HC11
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@cindex @code{ldouble} directive M68HC11
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@item .extend
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@itemx .ldouble
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@code{Extended} precision (@code{long double}) floating point constants.
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@end table
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@need 2000
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@node M68HC11-opcodes
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@section Opcodes
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@cindex M68HC11 opcodes
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@cindex opcodes, M68HC11
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@cindex instruction set, M68HC11
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@menu
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* M68HC11-Branch:: Branch Improvement
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@end menu
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@node M68HC11-Branch
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@subsection Branch Improvement
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@cindex pseudo-opcodes, M68HC11
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@cindex M68HC11 pseudo-opcodes
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@cindex branch improvement, M68HC11
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@cindex M68HC11 branch improvement
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Certain pseudo opcodes are permitted for branch instructions.
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They expand to the shortest branch instruction that reach the
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target. Generally these mnemonics are made by prepending @samp{j} to
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the start of Motorola mnemonic. These pseudo opcodes are not affected
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by the @samp{--short-branchs} or @samp{--force-long-branchs} options.
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The following table summarizes the pseudo-operations.
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@smallexample
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Displacement Width
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+-------------------------------------------------------------+
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| Options |
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| --short-branchs --force-long-branchs |
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+--------------------------+----------------------------------+
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Op |BYTE WORD | BYTE WORD |
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+--------------------------+----------------------------------+
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bsr | bsr <pc-rel> <error> | jsr <abs> |
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bra | bra <pc-rel> <error> | jmp <abs> |
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jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
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jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
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bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
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jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
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| jmp <abs> | |
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+--------------------------+----------------------------------+
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XX: condition
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NX: negative of condition XX
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@end smallexample
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@table @code
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@item jbsr
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@itemx jbra
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These are the simplest jump pseudo-operations; they always map to one
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particular machine instruction, depending on the displacement to the
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branch target.
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@item jb@var{XX}
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Here, @samp{jb@var{XX}} stands for an entire family of pseudo-operations,
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where @var{XX} is a conditional branch or condition-code test. The full
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list of pseudo-ops in this family is:
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@smallexample
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jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo
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jbcs jbne jblt jble jbls jbvc jbmi
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@end smallexample
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For the cases of non-PC relative displacements and long displacements,
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@code{@value{AS}} issues a longer code fragment in terms of
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@var{NX}, the opposite condition to @var{XX}. For example, for the
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non-PC relative case:
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@smallexample
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jb@var{XX} foo
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@end smallexample
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gives
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@smallexample
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b@var{NX}s oof
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jmp foo
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oof:
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@end smallexample
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@end table
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