1206 lines
26 KiB
C
1206 lines
26 KiB
C
/* $NetBSD: txcom.c,v 1.15 2002/01/29 18:53:19 uch Exp $ */
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/*-
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* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by UCHIYAMA Yasushi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_tx39uart_debug.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/proc.h> /* tsleep/wakeup */
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#include <sys/ioctl.h>
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#include <sys/select.h>
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#include <sys/file.h>
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#include <sys/tty.h>
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#include <sys/conf.h>
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#include <dev/cons.h> /* consdev */
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#include <machine/bus.h>
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#include <machine/config_hook.h>
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#include <hpcmips/tx/tx39var.h>
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#include <hpcmips/tx/tx39icureg.h>
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#include <hpcmips/tx/tx39uartvar.h>
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#include <hpcmips/tx/tx39uartreg.h>
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#include <hpcmips/tx/tx39irvar.h>
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#include <hpcmips/tx/tx39clockreg.h> /* XXX */
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#define SET(t, f) (t) |= (f)
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#define CLR(t, f) (t) &= ~(f)
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#define ISSET(t, f) ((t) & (f))
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/*
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* UARTA channel has DTR, DSR, RTS, CTS lines. and they wired to MFIO/IO port.
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*/
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#define IS_COM0(s) ((s) == 0)
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#define IS_COM1(s) ((s) == 1)
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#define ON ((void *)1)
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#define OFF ((void *)0)
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#ifdef TX39UART_DEBUG
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#define DPRINTF_ENABLE
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#define DPRINTF_DEBUG tx39uart_debug
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#endif
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#include <machine/debug.h>
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#define TXCOM_HW_CONSOLE 0x40
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#define TXCOM_RING_SIZE 256 /* must be a power of two! */
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#define TXCOM_RING_MASK (TXCOM_RING_SIZE - 1)
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struct txcom_chip {
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tx_chipset_tag_t sc_tc;
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int sc_slot; /* UARTA or UARTB */
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int sc_cflag;
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int sc_speed;
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int sc_swflags;
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int sc_hwflags;
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int sc_dcd;
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int sc_msr_cts;
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int sc_tx_stopped;
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};
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struct txcom_softc {
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struct device sc_dev;
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struct tty *sc_tty;
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struct txcom_chip *sc_chip;
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struct callout sc_txsoft_ch;
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struct callout sc_rxsoft_ch;
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u_int8_t *sc_tba; /* transmit buffer address */
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int sc_tbc; /* transmit byte count */
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int sc_heldtbc;
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u_int8_t *sc_rbuf; /* receive buffer address */
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int sc_rbput; /* receive byte count */
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int sc_rbget;
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};
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extern struct cfdriver txcom_cd;
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int txcom_match(struct device *, struct cfdata *, void *);
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void txcom_attach(struct device *, struct device *, void *);
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int txcom_print(void*, const char *);
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int txcom_txintr(void *);
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int txcom_rxintr(void *);
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int txcom_frameerr_intr(void *);
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int txcom_parityerr_intr(void *);
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int txcom_break_intr(void *);
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void txcom_rxsoft(void *);
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void txcom_txsoft(void *);
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int txcom_stsoft(void *);
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int txcom_stsoft2(void *);
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int txcom_stsoft3(void *);
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int txcom_stsoft4(void *);
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void txcom_shutdown(struct txcom_softc *);
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void txcom_break(struct txcom_softc *, int);
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void txcom_modem(struct txcom_softc *, int);
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void txcomstart(struct tty *);
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int txcomparam(struct tty *, struct termios *);
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void txcom_reset (struct txcom_chip *);
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int txcom_enable (struct txcom_chip *);
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void txcom_disable (struct txcom_chip *);
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void txcom_setmode (struct txcom_chip *);
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void txcom_setbaudrate(struct txcom_chip *);
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int txcom_cngetc (dev_t);
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void txcom_cnputc (dev_t, int);
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void txcom_cnpollc (dev_t, int);
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int txcom_dcd_hook(void *, int, long, void *);
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int txcom_cts_hook(void *, int, long, void *);
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__inline__ int __txcom_txbufready(struct txcom_chip *, int);
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const char *__txcom_slotname(int);
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#ifdef TX39UARTDEBUG
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void txcom_dump(struct txcom_chip *);
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#endif
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cdev_decl(txcom);
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struct consdev txcomcons = {
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NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc,
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NULL, NODEV, CN_NORMAL
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};
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/* Serial console */
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struct txcom_chip txcom_chip;
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struct cfattach txcom_ca = {
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sizeof(struct txcom_softc), txcom_match, txcom_attach
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};
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int
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txcom_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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/* if the autoconfiguration got this far, there's a slot here */
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return 1;
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}
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void
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txcom_attach(struct device *parent, struct device *self, void *aux)
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{
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struct tx39uart_attach_args *ua = aux;
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struct txcom_softc *sc = (void*)self;
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tx_chipset_tag_t tc;
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struct tty *tp;
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struct txcom_chip *chip;
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int slot, console;
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/* Check this slot used as serial console */
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console = (ua->ua_slot == txcom_chip.sc_slot) &&
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(txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
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if (console) {
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sc->sc_chip = &txcom_chip;
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} else {
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if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
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M_DEVBUF, M_WAITOK))) {
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printf(": can't allocate chip\n");
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return;
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}
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memset(sc->sc_chip, 0, sizeof(struct txcom_chip));
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}
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chip = sc->sc_chip;
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tc = chip->sc_tc = ua->ua_tc;
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slot = chip->sc_slot = ua->ua_slot;
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#ifdef TX39UARTDEBUG
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txcom_dump(chip);
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#endif
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if (!console)
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txcom_reset(chip);
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if (!(sc->sc_rbuf = malloc(TXCOM_RING_SIZE, M_DEVBUF, M_WAITOK))) {
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printf(": can't allocate buffer.\n");
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return;
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}
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memset(sc->sc_rbuf, 0, TXCOM_RING_SIZE);
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tp = ttymalloc();
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tp->t_oproc = txcomstart;
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tp->t_param = txcomparam;
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tp->t_hwiflow = NULL;
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sc->sc_tty = tp;
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tty_attach(tp);
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if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
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int maj;
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/* locate the major number */
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for (maj = 0; maj < nchrdev; maj++)
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if (cdevsw[maj].d_open == txcomopen)
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break;
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cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
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printf(": console");
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}
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printf("\n");
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/*
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* Enable interrupt
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*/
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#define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
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tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
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txcom_rxintr, sc);
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tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
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txcom_txintr, sc);
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tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
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txcom_rxintr, sc);
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tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
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txcom_txintr, sc);
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tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
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txcom_frameerr_intr, sc);
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tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
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txcom_parityerr_intr, sc);
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tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
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txcom_break_intr, sc);
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/*
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* UARTA has external signal line. (its wiring is platform dependent)
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*/
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if (IS_COM0(slot)) {
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/* install DCD, CTS hooks. */
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config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
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CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
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config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
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CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
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}
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/*
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* UARTB can connect IR module
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*/
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if (IS_COM1(slot)) {
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struct txcom_attach_args tca;
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tca.tca_tc = tc;
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tca.tca_parent = self;
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config_found(self, &tca, txcom_print);
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}
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}
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int
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txcom_print(void *aux, const char *pnp)
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{
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return pnp ? QUIET : UNCONF;
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}
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void
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txcom_reset(struct txcom_chip *chip)
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{
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tx_chipset_tag_t tc;
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int slot, ofs;
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txreg_t reg;
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tc = chip->sc_tc;
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slot = chip->sc_slot;
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ofs = TX39_UARTCTRL1_REG(slot);
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/* Supply clock */
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reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
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reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
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tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
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/* reset UART module */
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tx_conf_write(tc, ofs, 0);
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}
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int
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txcom_enable(struct txcom_chip *chip)
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{
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tx_chipset_tag_t tc;
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txreg_t reg;
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int slot, ofs, timeout;
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tc = chip->sc_tc;
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slot = chip->sc_slot;
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ofs = TX39_UARTCTRL1_REG(slot);
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/* External power supply (if any) */
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config_hook_call(CONFIG_HOOK_POWERCONTROL,
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CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
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delay(3);
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/* Supply clock */
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reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
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reg |= (slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
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tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
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/*
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* XXX Disable DMA (DMA not coded yet)
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*/
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reg = tx_conf_read(tc, ofs);
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reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
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tx_conf_write(tc, ofs, reg);
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/* enable */
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reg = tx_conf_read(tc, ofs);
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reg |= TX39_UARTCTRL1_ENUART;
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reg &= ~TX39_UARTCTRL1_ENBREAHALT;
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tx_conf_write(tc, ofs, reg);
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timeout = 100000;
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while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
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--timeout > 0)
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;
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if (timeout == 0 && !cold) {
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printf("%s never power up\n", __txcom_slotname(slot));
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return 1;
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}
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return 0;
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}
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void
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txcom_disable(struct txcom_chip *chip)
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{
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tx_chipset_tag_t tc;
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txreg_t reg;
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int slot;
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tc = chip->sc_tc;
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slot = chip->sc_slot;
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reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
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/* DMA */
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reg &= ~(TX39_UARTCTRL1_ENDMARX | TX39_UARTCTRL1_ENDMATX);
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/* disable module */
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reg &= ~TX39_UARTCTRL1_ENUART;
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tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
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/* Clock */
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reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
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reg &= ~(slot ? TX39_CLOCK_ENUARTBCLK : TX39_CLOCK_ENUARTACLK);
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tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
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}
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__inline__ int
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__txcom_txbufready(struct txcom_chip *chip, int retry)
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{
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tx_chipset_tag_t tc = chip->sc_tc;
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int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
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do {
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if (tx_conf_read(tc, ofs) & TX39_UARTCTRL1_EMPTY)
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return 1;
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} while(--retry != 0);
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return 0;
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}
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void
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txcom_pulse_mode(struct device *dev)
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{
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struct txcom_softc *sc = (void*)dev;
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struct txcom_chip *chip = sc->sc_chip;
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tx_chipset_tag_t tc = chip->sc_tc;
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int ofs;
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txreg_t reg;
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ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
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reg = tx_conf_read(tc, ofs);
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/* WindowsCE use this setting */
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reg |= TX39_UARTCTRL1_PULSEOPT1;
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reg &= ~TX39_UARTCTRL1_PULSEOPT2;
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reg |= TX39_UARTCTRL1_DTINVERT;
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tx_conf_write(tc, ofs, reg);
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}
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/*
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* console
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*/
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int
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txcom_cngetc(dev_t dev)
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{
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tx_chipset_tag_t tc;
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int ofs, c, s;
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s = spltty();
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tc = txcom_chip.sc_tc;
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ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);
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while(!(TX39_UARTCTRL1_RXHOLDFULL & tx_conf_read(tc, ofs)))
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;
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c = TX39_UARTRXHOLD_RXDATA(
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tx_conf_read(tc, TX39_UARTRXHOLD_REG(txcom_chip.sc_slot)));
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if (c == '\r')
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c = '\n';
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splx(s);
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return c;
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}
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void
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txcom_cnputc(dev_t dev, int c)
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{
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struct txcom_chip *chip = &txcom_chip;
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tx_chipset_tag_t tc = chip->sc_tc;
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int s;
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s = spltty();
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/* Wait for transmitter to empty */
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__txcom_txbufready(chip, -1);
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tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
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(c & TX39_UARTTXHOLD_TXDATA_MASK));
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__txcom_txbufready(chip, -1);
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splx(s);
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}
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void
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txcom_cnpollc(dev_t dev, int on)
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{
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}
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void
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txcom_setmode(struct txcom_chip *chip)
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{
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tcflag_t cflag = chip->sc_cflag;
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int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
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txreg_t reg;
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reg = tx_conf_read(chip->sc_tc, ofs);
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reg &= ~TX39_UARTCTRL1_ENUART;
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tx_conf_write(chip->sc_tc, ofs, reg);
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switch (ISSET(cflag, CSIZE)) {
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default:
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printf("txcom_setmode: CS7, CS8 only. use CS7");
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/* FALL THROUGH */
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case CS7:
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reg |= TX39_UARTCTRL1_BIT7;
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break;
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case CS8:
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reg &= ~TX39_UARTCTRL1_BIT7;
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break;
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}
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if (ISSET(cflag, PARENB)) {
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reg |= TX39_UARTCTRL1_ENPARITY;
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if (ISSET(cflag, PARODD)) {
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reg &= ~TX39_UARTCTRL1_EVENPARITY;
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} else {
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reg |= TX39_UARTCTRL1_EVENPARITY;
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}
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} else {
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reg &= ~TX39_UARTCTRL1_ENPARITY;
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}
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|
if (ISSET(cflag, CSTOPB))
|
|
reg |= TX39_UARTCTRL1_TWOSTOP;
|
|
else
|
|
reg &= ~TX39_UARTCTRL1_TWOSTOP;
|
|
|
|
reg |= TX39_UARTCTRL1_ENUART;
|
|
tx_conf_write(chip->sc_tc, ofs, reg);
|
|
}
|
|
|
|
void
|
|
txcom_setbaudrate(struct txcom_chip *chip)
|
|
{
|
|
int baudrate;
|
|
int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);
|
|
txreg_t reg, reg1;
|
|
|
|
if (chip->sc_speed == 0)
|
|
return;
|
|
|
|
if (!cold)
|
|
DPRINTF("%d\n", chip->sc_speed);
|
|
|
|
reg1 = tx_conf_read(chip->sc_tc, ofs);
|
|
reg1 &= ~TX39_UARTCTRL1_ENUART;
|
|
tx_conf_write(chip->sc_tc, ofs, reg1);
|
|
|
|
baudrate = TX39_UARTCLOCKHZ / (chip->sc_speed * 16) - 1;
|
|
reg = TX39_UARTCTRL2_BAUDRATE_SET(0, baudrate);
|
|
|
|
tx_conf_write(chip->sc_tc, TX39_UARTCTRL2_REG(chip->sc_slot), reg);
|
|
|
|
reg1 |= TX39_UARTCTRL1_ENUART;
|
|
tx_conf_write(chip->sc_tc, ofs, reg1);
|
|
}
|
|
|
|
int
|
|
txcom_cnattach(int slot, int speed, int cflag)
|
|
{
|
|
cn_tab = &txcomcons;
|
|
|
|
txcom_chip.sc_tc = tx_conf_get_tag();
|
|
txcom_chip.sc_slot = slot;
|
|
txcom_chip.sc_cflag = cflag;
|
|
txcom_chip.sc_speed = speed;
|
|
txcom_chip.sc_hwflags |= TXCOM_HW_CONSOLE;
|
|
#if notyet
|
|
txcom_reset(&txcom_chip);
|
|
#endif
|
|
txcom_setmode(&txcom_chip);
|
|
txcom_setbaudrate(&txcom_chip);
|
|
|
|
if (txcom_enable(&txcom_chip))
|
|
return 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* tty
|
|
*/
|
|
void
|
|
txcom_break(struct txcom_softc *sc, int on)
|
|
{
|
|
struct txcom_chip *chip = sc->sc_chip;
|
|
|
|
tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
|
|
on ? TX39_UARTTXHOLD_BREAK : 0);
|
|
}
|
|
|
|
void
|
|
txcom_modem(struct txcom_softc *sc, int on)
|
|
{
|
|
struct txcom_chip *chip = sc->sc_chip;
|
|
tx_chipset_tag_t tc = chip->sc_tc;
|
|
int slot = chip->sc_slot;
|
|
txreg_t reg;
|
|
|
|
/* assert DTR */
|
|
if (IS_COM0(slot)) {
|
|
config_hook_call(CONFIG_HOOK_SET,
|
|
CONFIG_HOOK_COM0_DTR,
|
|
(void *)on);
|
|
}
|
|
|
|
reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
|
|
reg &= ~TX39_UARTCTRL1_ENUART;
|
|
tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
|
|
|
|
if (on) {
|
|
reg &= ~TX39_UARTCTRL1_DISTXD;
|
|
} else {
|
|
reg |= TX39_UARTCTRL1_DISTXD; /* low UARTTXD */
|
|
}
|
|
|
|
reg |= TX39_UARTCTRL1_ENUART;
|
|
tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);
|
|
}
|
|
|
|
void
|
|
txcom_shutdown(struct txcom_softc *sc)
|
|
{
|
|
struct tty *tp = sc->sc_tty;
|
|
int s = spltty();
|
|
|
|
/* Clear any break condition set with TIOCSBRK. */
|
|
txcom_break(sc, 0);
|
|
|
|
/*
|
|
* Hang up if necessary. Wait a bit, so the other side has time to
|
|
* notice even if we immediately open the port again.
|
|
*/
|
|
if (ISSET(tp->t_cflag, HUPCL)) {
|
|
txcom_modem(sc, 0);
|
|
(void) tsleep(sc, TTIPRI, ttclos, hz);
|
|
}
|
|
|
|
|
|
/* Turn off interrupts if not the console. */
|
|
if (!ISSET(sc->sc_chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
|
|
txcom_disable(sc->sc_chip);
|
|
}
|
|
|
|
splx(s);
|
|
}
|
|
|
|
const char *
|
|
__txcom_slotname(int slot)
|
|
{
|
|
static const char *slotname[] = {"UARTA", "UARTB", "unknown"};
|
|
|
|
if (slot != 0 && slot != 1)
|
|
return slotname[2];
|
|
|
|
return slotname[slot];
|
|
}
|
|
|
|
int
|
|
txcom_frameerr_intr(void *arg)
|
|
{
|
|
struct txcom_softc *sc = arg;
|
|
|
|
printf("%s frame error\n", __txcom_slotname(sc->sc_chip->sc_slot));
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
txcom_parityerr_intr(void *arg)
|
|
{
|
|
struct txcom_softc *sc = arg;
|
|
|
|
printf("%s parity error\n", __txcom_slotname(sc->sc_chip->sc_slot));
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
txcom_break_intr(void *arg)
|
|
{
|
|
struct txcom_softc *sc = arg;
|
|
|
|
printf("%s break\n", __txcom_slotname(sc->sc_chip->sc_slot));
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
txcom_rxintr(void *arg)
|
|
{
|
|
struct txcom_softc *sc = arg;
|
|
struct txcom_chip *chip = sc->sc_chip;
|
|
u_int8_t c;
|
|
|
|
c = TX39_UARTRXHOLD_RXDATA(
|
|
tx_conf_read(chip->sc_tc,
|
|
TX39_UARTRXHOLD_REG(chip->sc_slot)));
|
|
|
|
sc->sc_rbuf[sc->sc_rbput] = c;
|
|
sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
|
|
|
|
callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
txcom_rxsoft(void *arg)
|
|
{
|
|
struct txcom_softc *sc = arg;
|
|
struct tty *tp = sc->sc_tty;
|
|
int (*rint)(int, struct tty *);
|
|
int code;
|
|
int s, end, get;
|
|
|
|
rint = tp->t_linesw->l_rint;
|
|
|
|
s = spltty();
|
|
end = sc->sc_rbput;
|
|
get = sc->sc_rbget;
|
|
|
|
while (get != end) {
|
|
code = sc->sc_rbuf[get];
|
|
|
|
if ((*rint)(code, tp) == -1) {
|
|
/*
|
|
* The line discipline's buffer is out of space.
|
|
*/
|
|
}
|
|
get = (get + 1) % TXCOM_RING_MASK;
|
|
}
|
|
sc->sc_rbget = get;
|
|
|
|
splx(s);
|
|
}
|
|
|
|
int
|
|
txcom_txintr(void *arg)
|
|
{
|
|
struct txcom_softc *sc = arg;
|
|
struct txcom_chip *chip = sc->sc_chip;
|
|
tx_chipset_tag_t tc = chip->sc_tc;
|
|
|
|
if (sc->sc_tbc > 0) {
|
|
tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
|
|
(*sc->sc_tba &
|
|
TX39_UARTTXHOLD_TXDATA_MASK));
|
|
sc->sc_tbc--;
|
|
sc->sc_tba++;
|
|
} else {
|
|
callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
txcom_txsoft(void *arg)
|
|
{
|
|
struct txcom_softc *sc = arg;
|
|
struct tty *tp = sc->sc_tty;
|
|
int s = spltty();
|
|
|
|
CLR(tp->t_state, TS_BUSY);
|
|
if (ISSET(tp->t_state, TS_FLUSH)) {
|
|
CLR(tp->t_state, TS_FLUSH);
|
|
} else {
|
|
ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
|
|
}
|
|
|
|
(*tp->t_linesw->l_start)(tp);
|
|
|
|
splx(s);
|
|
}
|
|
|
|
int
|
|
txcomopen(dev_t dev, int flag, int mode, struct proc *p)
|
|
{
|
|
struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
|
|
struct txcom_chip *chip;
|
|
struct tty *tp;
|
|
int s, err;
|
|
|
|
if (!sc)
|
|
return ENXIO;
|
|
|
|
chip = sc->sc_chip;
|
|
tp = sc->sc_tty;
|
|
|
|
if (ISSET(tp->t_state, TS_ISOPEN) &&
|
|
ISSET(tp->t_state, TS_XCLUDE) &&
|
|
p->p_ucred->cr_uid != 0)
|
|
return (EBUSY);
|
|
|
|
s = spltty();
|
|
|
|
if (txcom_enable(sc->sc_chip)) {
|
|
splx(s);
|
|
goto out;
|
|
}
|
|
/*
|
|
* Do the following iff this is a first open.
|
|
*/
|
|
if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
|
|
struct termios t;
|
|
|
|
tp->t_dev = dev;
|
|
|
|
t.c_ispeed = 0;
|
|
if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
|
|
t.c_ospeed = chip->sc_speed;
|
|
t.c_cflag = chip->sc_cflag;
|
|
} else {
|
|
t.c_ospeed = TTYDEF_SPEED;
|
|
t.c_cflag = TTYDEF_CFLAG;
|
|
}
|
|
|
|
if (ISSET(chip->sc_swflags, TIOCFLAG_CLOCAL))
|
|
SET(t.c_cflag, CLOCAL);
|
|
if (ISSET(chip->sc_swflags, TIOCFLAG_CRTSCTS))
|
|
SET(t.c_cflag, CRTSCTS);
|
|
if (ISSET(chip->sc_swflags, TIOCFLAG_MDMBUF))
|
|
SET(t.c_cflag, MDMBUF);
|
|
|
|
/* Make sure txcomparam() will do something. */
|
|
tp->t_ospeed = 0;
|
|
txcomparam(tp, &t);
|
|
|
|
tp->t_iflag = TTYDEF_IFLAG;
|
|
tp->t_oflag = TTYDEF_OFLAG;
|
|
tp->t_lflag = TTYDEF_LFLAG;
|
|
|
|
ttychars(tp);
|
|
ttsetwater(tp);
|
|
|
|
/*
|
|
* Turn on DTR. We must always do this, even if carrier is not
|
|
* present, because otherwise we'd have to use TIOCSDTR
|
|
* immediately after setting CLOCAL, which applications do not
|
|
* expect. We always assert DTR while the device is open
|
|
* unless explicitly requested to deassert it.
|
|
*/
|
|
txcom_modem(sc, 1);
|
|
|
|
/* Clear the input ring, and unblock. */
|
|
sc->sc_rbget = sc->sc_rbput = 0;
|
|
}
|
|
|
|
splx(s);
|
|
#define TXCOMDIALOUT(x) (minor(x) & 0x80000)
|
|
if ((err = ttyopen(tp, TXCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)))) {
|
|
DPRINTF("ttyopen failed\n");
|
|
goto out;
|
|
}
|
|
if ((err = (*tp->t_linesw->l_open)(dev, tp))) {
|
|
DPRINTF("line dicipline open failed\n");
|
|
goto out;
|
|
}
|
|
|
|
return err;
|
|
|
|
out:
|
|
if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
|
|
/*
|
|
* We failed to open the device, and nobody else had it opened.
|
|
* Clean up the state as appropriate.
|
|
*/
|
|
txcom_shutdown(sc);
|
|
}
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
int
|
|
txcomclose(dev_t dev, int flag, int mode, struct proc *p)
|
|
{
|
|
struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
|
|
struct tty *tp = sc->sc_tty;
|
|
|
|
/* XXX This is for cons.c. */
|
|
if (!ISSET(tp->t_state, TS_ISOPEN))
|
|
return 0;
|
|
|
|
(*tp->t_linesw->l_close)(tp, flag);
|
|
ttyclose(tp);
|
|
|
|
if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
|
|
/*
|
|
* Although we got a last close, the device may still be in
|
|
* use; e.g. if this was the dialout node, and there are still
|
|
* processes waiting for carrier on the non-dialout node.
|
|
*/
|
|
txcom_shutdown(sc);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
txcomread(dev_t dev, struct uio *uio, int flag)
|
|
{
|
|
struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
|
|
struct tty *tp = sc->sc_tty;
|
|
|
|
return ((*tp->t_linesw->l_read)(tp, uio, flag));
|
|
}
|
|
|
|
int
|
|
txcomwrite(dev_t dev, struct uio *uio, int flag)
|
|
{
|
|
struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
|
|
struct tty *tp = sc->sc_tty;
|
|
|
|
return ((*tp->t_linesw->l_write)(tp, uio, flag));
|
|
}
|
|
|
|
int
|
|
txcompoll(dev_t dev, int events, struct proc *p)
|
|
{
|
|
struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
|
|
struct tty *tp = sc->sc_tty;
|
|
|
|
return ((*tp->t_linesw->l_poll)(tp, events, p));
|
|
}
|
|
|
|
struct tty *
|
|
txcomtty(dev_t dev)
|
|
{
|
|
struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
|
|
|
|
return sc->sc_tty;
|
|
}
|
|
|
|
int
|
|
txcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
|
|
{
|
|
struct txcom_softc *sc = txcom_cd.cd_devs[minor(dev)];
|
|
struct tty *tp = sc->sc_tty;
|
|
int s, err;
|
|
|
|
err = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
|
|
if (err >= 0) {
|
|
return err;
|
|
}
|
|
|
|
err = ttioctl(tp, cmd, data, flag, p);
|
|
if (err >= 0) {
|
|
return err;
|
|
}
|
|
|
|
err = 0;
|
|
|
|
s = spltty();
|
|
|
|
switch (cmd) {
|
|
default:
|
|
err = ENOTTY;
|
|
break;
|
|
|
|
case TIOCSBRK:
|
|
txcom_break(sc, 1);
|
|
break;
|
|
|
|
case TIOCCBRK:
|
|
txcom_break(sc, 0);
|
|
break;
|
|
|
|
case TIOCSDTR:
|
|
txcom_modem(sc, 1);
|
|
break;
|
|
|
|
case TIOCCDTR:
|
|
txcom_modem(sc, 0);
|
|
break;
|
|
|
|
case TIOCGFLAGS:
|
|
*(int *)data = sc->sc_chip->sc_swflags;
|
|
break;
|
|
|
|
case TIOCSFLAGS:
|
|
err = suser(p->p_ucred, &p->p_acflag);
|
|
if (err) {
|
|
break;
|
|
}
|
|
sc->sc_chip->sc_swflags = *(int *)data;
|
|
break;
|
|
|
|
}
|
|
|
|
splx(s);
|
|
|
|
return err;
|
|
}
|
|
|
|
void
|
|
txcomstop(struct tty *tp, int flag)
|
|
{
|
|
struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
|
|
int s;
|
|
|
|
s = spltty();
|
|
|
|
if (ISSET(tp->t_state, TS_BUSY)) {
|
|
/* Stop transmitting at the next chunk. */
|
|
sc->sc_tbc = 0;
|
|
sc->sc_heldtbc = 0;
|
|
if (!ISSET(tp->t_state, TS_TTSTOP))
|
|
SET(tp->t_state, TS_FLUSH);
|
|
}
|
|
|
|
splx(s);
|
|
}
|
|
|
|
void
|
|
txcomstart(struct tty *tp)
|
|
{
|
|
struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
|
|
struct txcom_chip *chip = sc->sc_chip;
|
|
tx_chipset_tag_t tc = chip->sc_tc;
|
|
int slot = chip->sc_slot;
|
|
int s;
|
|
|
|
s = spltty();
|
|
|
|
if (!__txcom_txbufready(chip, 0) ||
|
|
ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
|
|
goto out;
|
|
|
|
if (tp->t_outq.c_cc <= tp->t_lowat) {
|
|
if (ISSET(tp->t_state, TS_ASLEEP)) {
|
|
CLR(tp->t_state, TS_ASLEEP);
|
|
wakeup(&tp->t_outq);
|
|
}
|
|
selwakeup(&tp->t_wsel);
|
|
if (tp->t_outq.c_cc == 0)
|
|
goto out;
|
|
}
|
|
|
|
sc->sc_tba = tp->t_outq.c_cf;
|
|
sc->sc_tbc = ndqb(&tp->t_outq, 0);
|
|
SET(tp->t_state, TS_BUSY);
|
|
|
|
/* Output the first character of the contiguous buffer. */
|
|
tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
|
|
(*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
|
|
|
|
sc->sc_tbc--;
|
|
sc->sc_tba++;
|
|
|
|
out:
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* Set TXcom tty parameters from termios.
|
|
*/
|
|
int
|
|
txcomparam(struct tty *tp, struct termios *t)
|
|
{
|
|
struct txcom_softc *sc = txcom_cd.cd_devs[minor(tp->t_dev)];
|
|
struct txcom_chip *chip;
|
|
int ospeed;
|
|
int s;
|
|
|
|
if (!sc)
|
|
return ENXIO;
|
|
|
|
ospeed = t->c_ospeed;
|
|
|
|
/* Check requested parameters. */
|
|
if (ospeed < 0) {
|
|
return EINVAL;
|
|
}
|
|
if (t->c_ispeed && t->c_ispeed != ospeed) {
|
|
return EINVAL;
|
|
}
|
|
|
|
s = spltty();
|
|
chip = sc->sc_chip;
|
|
/*
|
|
* For the console, always force CLOCAL and !HUPCL, so that the port
|
|
* is always active.
|
|
*/
|
|
if (ISSET(chip->sc_swflags, TIOCFLAG_SOFTCAR) ||
|
|
ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
|
|
SET(t->c_cflag, CLOCAL);
|
|
CLR(t->c_cflag, HUPCL);
|
|
}
|
|
splx(s);
|
|
|
|
/*
|
|
* If we're not in a mode that assumes a connection is present, then
|
|
* ignore carrier changes.
|
|
*/
|
|
if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
|
|
chip->sc_dcd = 0;
|
|
else
|
|
chip->sc_dcd = 1;
|
|
|
|
/*
|
|
* Only whack the UART when params change.
|
|
* Some callers need to clear tp->t_ospeed
|
|
* to make sure initialization gets done.
|
|
*/
|
|
if (tp->t_ospeed == ospeed && tp->t_cflag == t->c_cflag) {
|
|
return 0;
|
|
}
|
|
|
|
s = spltty();
|
|
chip = sc->sc_chip;
|
|
chip->sc_speed = ospeed;
|
|
chip->sc_cflag = t->c_cflag;
|
|
|
|
txcom_setmode(chip);
|
|
txcom_setbaudrate(chip);
|
|
|
|
/* And copy to tty. */
|
|
tp->t_ispeed = 0;
|
|
tp->t_ospeed = chip->sc_speed;
|
|
tp->t_cflag = chip->sc_cflag;
|
|
|
|
/*
|
|
* Update the tty layer's idea of the carrier bit, in case we changed
|
|
* CLOCAL or MDMBUF. We don't hang up here; we only do that by
|
|
* explicit request.
|
|
*/
|
|
(void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
|
|
|
|
/*
|
|
* If hardware flow control is disabled, unblock any hard flow
|
|
* control state.
|
|
*/
|
|
if (!ISSET(chip->sc_cflag, CHWFLOW)) {
|
|
txcomstart(tp);
|
|
}
|
|
|
|
splx(s);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
txcom_dcd_hook(void *arg, int type, long id, void *msg)
|
|
{
|
|
struct txcom_softc *sc = arg;
|
|
struct tty *tp = sc->sc_tty;
|
|
struct txcom_chip *chip = sc->sc_chip;
|
|
int modem = !(int)msg; /* p-edge 1, n-edge 0 */
|
|
|
|
DPRINTF("DCD %s\n", modem ? "ON" : "OFF");
|
|
|
|
if (modem && chip->sc_dcd)
|
|
(void) (*tp->t_linesw->l_modem)(tp, chip->sc_dcd);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
txcom_cts_hook(void *arg, int type, long id, void *msg)
|
|
{
|
|
struct txcom_softc *sc = arg;
|
|
struct tty *tp = sc->sc_tty;
|
|
struct txcom_chip *chip = sc->sc_chip;
|
|
int clear = !(int)msg; /* p-edge 1, n-edge 0 */
|
|
|
|
DPRINTF("CTS %s\n", clear ? "ON" : "OFF");
|
|
|
|
if (chip->sc_msr_cts) {
|
|
if (!clear) {
|
|
chip->sc_tx_stopped = 1;
|
|
} else {
|
|
chip->sc_tx_stopped = 0;
|
|
(*tp->t_linesw->l_start)(tp);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef TX39UARTDEBUG
|
|
void
|
|
txcom_dump(struct txcom_chip *chip)
|
|
{
|
|
tx_chipset_tag_t tc = chip->sc_tc;
|
|
int slot = chip->sc_slot;
|
|
txreg_t reg;
|
|
|
|
reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
|
|
#define ISSETPRINT(r, m) \
|
|
dbg_bitmask_print(r, TX39_UARTCTRL1_##m, #m)
|
|
ISSETPRINT(reg, UARTON);
|
|
ISSETPRINT(reg, EMPTY);
|
|
ISSETPRINT(reg, PRXHOLDFULL);
|
|
ISSETPRINT(reg, RXHOLDFULL);
|
|
ISSETPRINT(reg, ENDMARX);
|
|
ISSETPRINT(reg, ENDMATX);
|
|
ISSETPRINT(reg, TESTMODE);
|
|
ISSETPRINT(reg, ENBREAHALT);
|
|
ISSETPRINT(reg, ENDMATEST);
|
|
ISSETPRINT(reg, ENDMALOOP);
|
|
ISSETPRINT(reg, PULSEOPT2);
|
|
ISSETPRINT(reg, PULSEOPT1);
|
|
ISSETPRINT(reg, DTINVERT);
|
|
ISSETPRINT(reg, DISTXD);
|
|
ISSETPRINT(reg, TWOSTOP);
|
|
ISSETPRINT(reg, LOOPBACK);
|
|
ISSETPRINT(reg, BIT7);
|
|
ISSETPRINT(reg, EVENPARITY);
|
|
ISSETPRINT(reg, ENPARITY);
|
|
ISSETPRINT(reg, ENUART);
|
|
}
|
|
#endif /* TX39UARTDEBUG */
|