1205 lines
47 KiB
Plaintext
1205 lines
47 KiB
Plaintext
This is Info file as.info, produced by Makeinfo-1.64 from the input
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file ./as.texinfo.
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START-INFO-DIR-ENTRY
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* As: (as). The GNU assembler.
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END-INFO-DIR-ENTRY
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This file documents the GNU Assembler "as".
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Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software
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Foundation, Inc.
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Permission is granted to make and distribute verbatim copies of this
|
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manual provided the copyright notice and this permission notice are
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preserved on all copies.
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Permission is granted to copy and distribute modified versions of
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this manual under the conditions for verbatim copying, provided that
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the entire resulting derived work is distributed under the terms of a
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permission notice identical to this one.
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Permission is granted to copy and distribute translations of this
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manual into another language, under the above conditions for modified
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versions.
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File: as.info, Node: H8/500 Opcodes, Prev: H8/500 Directives, Up: H8/500-Dependent
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Opcodes
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-------
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For detailed information on the H8/500 machine instruction set, see
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`H8/500 Series Programming Manual' (Hitachi M21T001).
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`as' implements all the standard H8/500 opcodes. No additional
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pseudo-instructions are needed on this family.
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The following table summarizes H8/500 opcodes and their operands:
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Legend:
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abs8 8-bit absolute address
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abs16 16-bit absolute address
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abs24 24-bit absolute address
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crb `ccr', `br', `ep', `dp', `tp', `dp'
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disp8 8-bit displacement
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ea `rn', `@rn', `@(d:8, rn)', `@(d:16, rn)',
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`@-rn', `@rn+', `@aa:8', `@aa:16',
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`#xx:8', `#xx:16'
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ea_mem `@rn', `@(d:8, rn)', `@(d:16, rn)',
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`@-rn', `@rn+', `@aa:8', `@aa:16'
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ea_noimm `rn', `@rn', `@(d:8, rn)', `@(d:16, rn)',
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`@-rn', `@rn+', `@aa:8', `@aa:16'
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fp r6
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imm4 4-bit immediate data
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imm8 8-bit immediate data
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imm16 16-bit immediate data
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pcrel8 8-bit offset from program counter
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pcrel16 16-bit offset from program counter
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qim `-2', `-1', `1', `2'
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rd any register
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rs a register distinct from rd
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rlist comma-separated list of registers in parentheses;
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register ranges `rd-rs' are allowed
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sp stack pointer (`r7')
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sr status register
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sz size; `.b' or `.w'. If omitted, default `.w'
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ldc[.b] ea,crb bcc[.w] pcrel16
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ldc[.w] ea,sr bcc[.b] pcrel8
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add[:q] sz qim,ea_noimm bhs[.w] pcrel16
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add[:g] sz ea,rd bhs[.b] pcrel8
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adds sz ea,rd bcs[.w] pcrel16
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addx sz ea,rd bcs[.b] pcrel8
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and sz ea,rd blo[.w] pcrel16
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andc[.b] imm8,crb blo[.b] pcrel8
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andc[.w] imm16,sr bne[.w] pcrel16
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bpt bne[.b] pcrel8
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bra[.w] pcrel16 beq[.w] pcrel16
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bra[.b] pcrel8 beq[.b] pcrel8
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bt[.w] pcrel16 bvc[.w] pcrel16
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bt[.b] pcrel8 bvc[.b] pcrel8
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brn[.w] pcrel16 bvs[.w] pcrel16
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brn[.b] pcrel8 bvs[.b] pcrel8
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bf[.w] pcrel16 bpl[.w] pcrel16
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bf[.b] pcrel8 bpl[.b] pcrel8
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bhi[.w] pcrel16 bmi[.w] pcrel16
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bhi[.b] pcrel8 bmi[.b] pcrel8
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bls[.w] pcrel16 bge[.w] pcrel16
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bls[.b] pcrel8 bge[.b] pcrel8
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blt[.w] pcrel16 mov[:g][.b] imm8,ea_mem
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blt[.b] pcrel8 mov[:g][.w] imm16,ea_mem
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bgt[.w] pcrel16 movfpe[.b] ea,rd
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bgt[.b] pcrel8 movtpe[.b] rs,ea_noimm
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ble[.w] pcrel16 mulxu sz ea,rd
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ble[.b] pcrel8 neg sz ea
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bclr sz imm4,ea_noimm nop
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bclr sz rs,ea_noimm not sz ea
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bnot sz imm4,ea_noimm or sz ea,rd
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bnot sz rs,ea_noimm orc[.b] imm8,crb
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bset sz imm4,ea_noimm orc[.w] imm16,sr
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bset sz rs,ea_noimm pjmp abs24
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bsr[.b] pcrel8 pjmp @rd
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bsr[.w] pcrel16 pjsr abs24
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btst sz imm4,ea_noimm pjsr @rd
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btst sz rs,ea_noimm prtd imm8
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clr sz ea prtd imm16
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cmp[:e][.b] imm8,rd prts
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cmp[:i][.w] imm16,rd rotl sz ea
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cmp[:g].b imm8,ea_noimm rotr sz ea
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cmp[:g][.w] imm16,ea_noimm rotxl sz ea
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Cmp[:g] sz ea,rd rotxr sz ea
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dadd rs,rd rtd imm8
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divxu sz ea,rd rtd imm16
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dsub rs,rd rts
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exts[.b] rd scb/f rs,pcrel8
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extu[.b] rd scb/ne rs,pcrel8
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jmp @rd scb/eq rs,pcrel8
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jmp @(imm8,rd) shal sz ea
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jmp @(imm16,rd) shar sz ea
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jmp abs16 shll sz ea
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jsr @rd shlr sz ea
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jsr @(imm8,rd) sleep
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jsr @(imm16,rd) stc[.b] crb,ea_noimm
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jsr abs16 stc[.w] sr,ea_noimm
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ldm @sp+,(rlist) stm (rlist),@-sp
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link fp,imm8 sub sz ea,rd
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link fp,imm16 subs sz ea,rd
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mov[:e][.b] imm8,rd subx sz ea,rd
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mov[:i][.w] imm16,rd swap[.b] rd
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mov[:l][.w] abs8,rd tas[.b] ea
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mov[:l].b abs8,rd trapa imm4
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mov[:s][.w] rs,abs8 trap/vs
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mov[:s].b rs,abs8 tst sz ea
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mov[:f][.w] @(disp8,fp),rd unlk fp
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mov[:f][.w] rs,@(disp8,fp) xch[.w] rs,rd
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mov[:f].b @(disp8,fp),rd xor sz ea,rd
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mov[:f].b rs,@(disp8,fp) xorc.b imm8,crb
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mov[:g] sz rs,ea_mem xorc.w imm16,sr
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mov[:g] sz ea,rd
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File: as.info, Node: HPPA-Dependent, Next: i386-Dependent, Prev: H8/500-Dependent, Up: Machine Dependencies
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HPPA Dependent Features
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=======================
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* Menu:
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* HPPA Notes:: Notes
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* HPPA Options:: Options
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* HPPA Syntax:: Syntax
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* HPPA Floating Point:: Floating Point
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* HPPA Directives:: HPPA Machine Directives
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* HPPA Opcodes:: Opcodes
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File: as.info, Node: HPPA Notes, Next: HPPA Options, Up: HPPA-Dependent
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Notes
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-----
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As a back end for GNU CC `as' has been throughly tested and should
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work extremely well. We have tested it only minimally on hand written
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assembly code and no one has tested it much on the assembly output from
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the HP compilers.
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The format of the debugging sections has changed since the original
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`as' port (version 1.3X) was released; therefore, you must rebuild all
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HPPA objects and libraries with the new assembler so that you can debug
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the final executable.
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The HPPA `as' port generates a small subset of the relocations
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available in the SOM and ELF object file formats. Additional relocation
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support will be added as it becomes necessary.
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File: as.info, Node: HPPA Options, Next: HPPA Syntax, Prev: HPPA Notes, Up: HPPA-Dependent
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Options
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-------
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`as' has no machine-dependent command-line options for the HPPA.
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File: as.info, Node: HPPA Syntax, Next: HPPA Floating Point, Prev: HPPA Options, Up: HPPA-Dependent
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Syntax
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------
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The assembler syntax closely follows the HPPA instruction set
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reference manual; assembler directives and general syntax closely
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follow the HPPA assembly language reference manual, with a few
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noteworthy differences.
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First, a colon may immediately follow a label definition. This is
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simply for compatibility with how most assembly language programmers
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write code.
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Some obscure expression parsing problems may affect hand written
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code which uses the `spop' instructions, or code which makes significant
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use of the `!' line separator.
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`as' is much less forgiving about missing arguments and other
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similar oversights than the HP assembler. `as' notifies you of missing
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arguments as syntax errors; this is regarded as a feature, not a bug.
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Finally, `as' allows you to use an external symbol without
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explicitly importing the symbol. *Warning:* in the future this will be
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an error for HPPA targets.
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Special characters for HPPA targets include:
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`;' is the line comment character.
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`!' can be used instead of a newline to separate statements.
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Since `$' has no special meaning, you may use it in symbol names.
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File: as.info, Node: HPPA Floating Point, Next: HPPA Directives, Prev: HPPA Syntax, Up: HPPA-Dependent
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Floating Point
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--------------
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The HPPA family uses IEEE floating-point numbers.
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File: as.info, Node: HPPA Directives, Next: HPPA Opcodes, Prev: HPPA Floating Point, Up: HPPA-Dependent
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||
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HPPA Assembler Directives
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-------------------------
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`as' for the HPPA supports many additional directives for
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compatibility with the native assembler. This section describes them
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only briefly. For detailed information on HPPA-specific assembler
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directives, see `HP9000 Series 800 Assembly Language Reference Manual'
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(HP 92432-90001).
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`as' does *not* support the following assembler directives described
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in the HP manual:
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.endm .liston
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.enter .locct
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.leave .macro
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.listoff
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Beyond those implemented for compatibility, `as' supports one
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additional assembler directive for the HPPA: `.param'. It conveys
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register argument locations for static functions. Its syntax closely
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follows the `.export' directive.
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These are the additional directives in `as' for the HPPA:
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`.block N'
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`.blockz N'
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Reserve N bytes of storage, and initialize them to zero.
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`.call'
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Mark the beginning of a procedure call. Only the special case
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with *no arguments* is allowed.
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`.callinfo [ PARAM=VALUE, ... ] [ FLAG, ... ]'
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Specify a number of parameters and flags that define the
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environment for a procedure.
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PARAM may be any of `frame' (frame size), `entry_gr' (end of
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general register range), `entry_fr' (end of float register range),
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`entry_sr' (end of space register range).
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The values for FLAG are `calls' or `caller' (proc has
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subroutines), `no_calls' (proc does not call subroutines),
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`save_rp' (preserve return pointer), `save_sp' (proc preserves
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stack pointer), `no_unwind' (do not unwind this proc), `hpux_int'
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(proc is interrupt routine).
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`.code'
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Assemble into the standard section called `$TEXT$', subsection
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`$CODE$'.
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`.copyright "STRING"'
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In the SOM object format, insert STRING into the object code,
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marked as a copyright string.
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`.copyright "STRING"'
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In the ELF object format, insert STRING into the object code,
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marked as a version string.
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`.enter'
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Not yet supported; the assembler rejects programs containing this
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directive.
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`.entry'
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Mark the beginning of a procedure.
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`.exit'
|
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Mark the end of a procedure.
|
||
|
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`.export NAME [ ,TYP ] [ ,PARAM=R ]'
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Make a procedure NAME available to callers. TYP, if present, must
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be one of `absolute', `code' (ELF only, not SOM), `data', `entry',
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`data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'.
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PARAM, if present, provides either relocation information for the
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procedure arguments and result, or a privilege level. PARAM may be
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`argwN' (where N ranges from `0' to `3', and indicates one of four
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one-word arguments); `rtnval' (the procedure's result); or
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`priv_lev' (privilege level). For arguments or the result, R
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specifies how to relocate, and must be one of `no' (not
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relocatable), `gr' (argument is in general register), `fr' (in
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floating point register), or `fu' (upper half of float register).
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For `priv_lev', R is an integer.
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||
|
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`.half N'
|
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Define a two-byte integer constant N; synonym for the portable
|
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`as' directive `.short'.
|
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|
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`.import NAME [ ,TYP ]'
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Converse of `.export'; make a procedure available to call. The
|
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arguments use the same conventions as the first two arguments for
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`.export'.
|
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|
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`.label NAME'
|
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Define NAME as a label for the current assembly location.
|
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`.leave'
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Not yet supported; the assembler rejects programs containing this
|
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directive.
|
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`.origin LC'
|
||
Advance location counter to LC. Synonym for the `{No Value For
|
||
"as"}' portable directive `.org'.
|
||
|
||
`.param NAME [ ,TYP ] [ ,PARAM=R ]'
|
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Similar to `.export', but used for static procedures.
|
||
|
||
`.proc'
|
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Use preceding the first statement of a procedure.
|
||
|
||
`.procend'
|
||
Use following the last statement of a procedure.
|
||
|
||
`LABEL .reg EXPR'
|
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Synonym for `.equ'; define LABEL with the absolute expression EXPR
|
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as its value.
|
||
|
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`.space SECNAME [ ,PARAMS ]'
|
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Switch to section SECNAME, creating a new section by that name if
|
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necessary. You may only use PARAMS when creating a new section,
|
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not when switching to an existing one. SECNAME may identify a
|
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section by number rather than by name.
|
||
|
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If specified, the list PARAMS declares attributes of the section,
|
||
identified by keywords. The keywords recognized are `spnum=EXP'
|
||
(identify this section by the number EXP, an absolute expression),
|
||
`sort=EXP' (order sections according to this sort key when linking;
|
||
EXP is an absolute expression), `unloadable' (section contains no
|
||
loadable data), `notdefined' (this section defined elsewhere), and
|
||
`private' (data in this section not available to other programs).
|
||
|
||
`.spnum SECNAM'
|
||
Allocate four bytes of storage, and initialize them with the
|
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section number of the section named SECNAM. (You can define the
|
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section number with the HPPA `.space' directive.)
|
||
|
||
`.string "STR"'
|
||
Copy the characters in the string STR to the object file. *Note
|
||
Strings: Strings, for information on escape sequences you can use
|
||
in `as' strings.
|
||
|
||
*Warning!* The HPPA version of `.string' differs from the usual
|
||
`as' definition: it does *not* write a zero byte after copying STR.
|
||
|
||
`.stringz "STR"'
|
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Like `.string', but appends a zero byte after copying STR to object
|
||
file.
|
||
|
||
`.subspa NAME [ ,PARAMS ]'
|
||
`.nsubspa NAME [ ,PARAMS ]'
|
||
Similar to `.space', but selects a subsection NAME within the
|
||
current section. You may only specify PARAMS when you create a
|
||
subsection (in the first instance of `.subspa' for this NAME).
|
||
|
||
If specified, the list PARAMS declares attributes of the
|
||
subsection, identified by keywords. The keywords recognized are
|
||
`quad=EXPR' ("quadrant" for this subsection), `align=EXPR'
|
||
(alignment for beginning of this subsection; a power of two),
|
||
`access=EXPR' (value for "access rights" field), `sort=EXPR'
|
||
(sorting order for this subspace in link), `code_only' (subsection
|
||
contains only code), `unloadable' (subsection cannot be loaded
|
||
into memory), `common' (subsection is common block), `dup_comm'
|
||
(initialized data may have duplicate names), or `zero' (subsection
|
||
is all zeros, do not write in object file).
|
||
|
||
`.nsubspa' always creates a new subspace with the given name, even
|
||
if one with the same name already exists.
|
||
|
||
`.version "STR"'
|
||
Write STR as version identifier in object code.
|
||
|
||
|
||
File: as.info, Node: HPPA Opcodes, Prev: HPPA Directives, Up: HPPA-Dependent
|
||
|
||
Opcodes
|
||
-------
|
||
|
||
For detailed information on the HPPA machine instruction set, see
|
||
`PA-RISC Architecture and Instruction Set Reference Manual' (HP
|
||
09740-90039).
|
||
|
||
|
||
File: as.info, Node: i386-Dependent, Next: i960-Dependent, Prev: HPPA-Dependent, Up: Machine Dependencies
|
||
|
||
80386 Dependent Features
|
||
========================
|
||
|
||
* Menu:
|
||
|
||
* i386-Options:: Options
|
||
* i386-Syntax:: AT&T Syntax versus Intel Syntax
|
||
* i386-Opcodes:: Opcode Naming
|
||
* i386-Regs:: Register Naming
|
||
* i386-prefixes:: Opcode Prefixes
|
||
* i386-Memory:: Memory References
|
||
* i386-jumps:: Handling of Jump Instructions
|
||
* i386-Float:: Floating Point
|
||
* i386-16bit:: Writing 16-bit Code
|
||
* i386-Notes:: Notes
|
||
|
||
|
||
File: as.info, Node: i386-Options, Next: i386-Syntax, Up: i386-Dependent
|
||
|
||
Options
|
||
-------
|
||
|
||
The 80386 has no machine dependent options.
|
||
|
||
|
||
File: as.info, Node: i386-Syntax, Next: i386-Opcodes, Prev: i386-Options, Up: i386-Dependent
|
||
|
||
AT&T Syntax versus Intel Syntax
|
||
-------------------------------
|
||
|
||
In order to maintain compatibility with the output of `gcc', `as'
|
||
supports AT&T System V/386 assembler syntax. This is quite different
|
||
from Intel syntax. We mention these differences because almost all
|
||
80386 documents used only Intel syntax. Notable differences between
|
||
the two syntaxes are:
|
||
|
||
* AT&T immediate operands are preceded by `$'; Intel immediate
|
||
operands are undelimited (Intel `push 4' is AT&T `pushl $4').
|
||
AT&T register operands are preceded by `%'; Intel register operands
|
||
are undelimited. AT&T absolute (as opposed to PC relative)
|
||
jump/call operands are prefixed by `*'; they are undelimited in
|
||
Intel syntax.
|
||
|
||
* AT&T and Intel syntax use the opposite order for source and
|
||
destination operands. Intel `add eax, 4' is `addl $4, %eax'. The
|
||
`source, dest' convention is maintained for compatibility with
|
||
previous Unix assemblers.
|
||
|
||
* In AT&T syntax the size of memory operands is determined from the
|
||
last character of the opcode name. Opcode suffixes of `b', `w',
|
||
and `l' specify byte (8-bit), word (16-bit), and long (32-bit)
|
||
memory references. Intel syntax accomplishes this by prefixes
|
||
memory operands (*not* the opcodes themselves) with `byte ptr',
|
||
`word ptr', and `dword ptr'. Thus, Intel `mov al, byte ptr FOO'
|
||
is `movb FOO, %al' in AT&T syntax.
|
||
|
||
* Immediate form long jumps and calls are `lcall/ljmp $SECTION,
|
||
$OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far
|
||
SECTION:OFFSET'. Also, the far return instruction is `lret
|
||
$STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far
|
||
STACK-ADJUST'.
|
||
|
||
* The AT&T assembler does not provide support for multiple section
|
||
programs. Unix style systems expect all programs to be single
|
||
sections.
|
||
|
||
|
||
File: as.info, Node: i386-Opcodes, Next: i386-Regs, Prev: i386-Syntax, Up: i386-Dependent
|
||
|
||
Opcode Naming
|
||
-------------
|
||
|
||
Opcode names are suffixed with one character modifiers which specify
|
||
the size of operands. The letters `b', `w', and `l' specify byte,
|
||
word, and long operands. If no suffix is specified by an instruction
|
||
and it contains no memory operands then `as' tries to fill in the
|
||
missing suffix based on the destination register operand (the last one
|
||
by convention). Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx';
|
||
also, `mov $1, %bx' is equivalent to `movw $1, %bx'. Note that this is
|
||
incompatible with the AT&T Unix assembler which assumes that a missing
|
||
opcode suffix implies long operand size. (This incompatibility does
|
||
not affect compiler output since compilers always explicitly specify
|
||
the opcode suffix.)
|
||
|
||
Almost all opcodes have the same names in AT&T and Intel format.
|
||
There are a few exceptions. The sign extend and zero extend
|
||
instructions need two sizes to specify them. They need a size to
|
||
sign/zero extend *from* and a size to zero extend *to*. This is
|
||
accomplished by using two opcode suffixes in AT&T syntax. Base names
|
||
for sign extend and zero extend are `movs...' and `movz...' in AT&T
|
||
syntax (`movsx' and `movzx' in Intel syntax). The opcode suffixes are
|
||
tacked on to this base name, the *from* suffix before the *to* suffix.
|
||
Thus, `movsbl %al, %edx' is AT&T syntax for "move sign extend *from*
|
||
%al *to* %edx." Possible suffixes, thus, are `bl' (from byte to long),
|
||
`bw' (from byte to word), and `wl' (from word to long).
|
||
|
||
The Intel-syntax conversion instructions
|
||
|
||
* `cbw' -- sign-extend byte in `%al' to word in `%ax',
|
||
|
||
* `cwde' -- sign-extend word in `%ax' to long in `%eax',
|
||
|
||
* `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax',
|
||
|
||
* `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax',
|
||
|
||
are called `cbtw', `cwtl', `cwtd', and `cltd' in AT&T naming. `as'
|
||
accepts either naming for these instructions.
|
||
|
||
Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax,
|
||
but are `call far' and `jump far' in Intel convention.
|
||
|
||
|
||
File: as.info, Node: i386-Regs, Next: i386-prefixes, Prev: i386-Opcodes, Up: i386-Dependent
|
||
|
||
Register Naming
|
||
---------------
|
||
|
||
Register operands are always prefixes with `%'. The 80386 registers
|
||
consist of
|
||
|
||
* the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx',
|
||
`%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp'
|
||
(the stack pointer).
|
||
|
||
* the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di',
|
||
`%si', `%bp', and `%sp'.
|
||
|
||
* the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl',
|
||
`%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax',
|
||
`%bx', `%cx', and `%dx')
|
||
|
||
* the 6 section registers `%cs' (code section), `%ds' (data
|
||
section), `%ss' (stack section), `%es', `%fs', and `%gs'.
|
||
|
||
* the 3 processor control registers `%cr0', `%cr2', and `%cr3'.
|
||
|
||
* the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and
|
||
`%db7'.
|
||
|
||
* the 2 test registers `%tr6' and `%tr7'.
|
||
|
||
* the 8 floating point register stack `%st' or equivalently
|
||
`%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)',
|
||
`%st(6)', and `%st(7)'.
|
||
|
||
|
||
File: as.info, Node: i386-prefixes, Next: i386-Memory, Prev: i386-Regs, Up: i386-Dependent
|
||
|
||
Opcode Prefixes
|
||
---------------
|
||
|
||
Opcode prefixes are used to modify the following opcode. They are
|
||
used to repeat string instructions, to provide section overrides, to
|
||
perform bus lock operations, and to give operand and address size
|
||
(16-bit operands are specified in an instruction by prefixing what would
|
||
normally be 32-bit operands with a "operand size" opcode prefix).
|
||
Opcode prefixes are usually given as single-line instructions with no
|
||
operands, and must directly precede the instruction they act upon. For
|
||
example, the `scas' (scan string) instruction is repeated with:
|
||
repne
|
||
scas
|
||
|
||
Here is a list of opcode prefixes:
|
||
|
||
* Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'.
|
||
These are automatically added by specifying using the
|
||
SECTION:MEMORY-OPERAND form for memory references.
|
||
|
||
* Operand/Address size prefixes `data16' and `addr16' change 32-bit
|
||
operands/addresses into 16-bit operands/addresses. Note that
|
||
16-bit addressing modes (i.e. 8086 and 80286 addressing modes) are
|
||
not supported (yet).
|
||
|
||
* The bus lock prefix `lock' inhibits interrupts during execution of
|
||
the instruction it precedes. (This is only valid with certain
|
||
instructions; see a 80386 manual for details).
|
||
|
||
* The wait for coprocessor prefix `wait' waits for the coprocessor
|
||
to complete the current instruction. This should never be needed
|
||
for the 80386/80387 combination.
|
||
|
||
* The `rep', `repe', and `repne' prefixes are added to string
|
||
instructions to make them repeat `%ecx' times.
|
||
|
||
|
||
File: as.info, Node: i386-Memory, Next: i386-jumps, Prev: i386-prefixes, Up: i386-Dependent
|
||
|
||
Memory References
|
||
-----------------
|
||
|
||
An Intel syntax indirect memory reference of the form
|
||
|
||
SECTION:[BASE + INDEX*SCALE + DISP]
|
||
|
||
is translated into the AT&T syntax
|
||
|
||
SECTION:DISP(BASE, INDEX, SCALE)
|
||
|
||
where BASE and INDEX are the optional 32-bit base and index registers,
|
||
DISP is the optional displacement, and SCALE, taking the values 1, 2,
|
||
4, and 8, multiplies INDEX to calculate the address of the operand. If
|
||
no SCALE is specified, SCALE is taken to be 1. SECTION specifies the
|
||
optional section register for the memory operand, and may override the
|
||
default section register (see a 80386 manual for section register
|
||
defaults). Note that section overrides in AT&T syntax *must* have be
|
||
preceded by a `%'. If you specify a section override which coincides
|
||
with the default section register, `as' does *not* output any section
|
||
register override prefixes to assemble the given instruction. Thus,
|
||
section overrides can be specified to emphasize which section register
|
||
is used for a given memory operand.
|
||
|
||
Here are some examples of Intel and AT&T style memory references:
|
||
|
||
AT&T: `-4(%ebp)', Intel: `[ebp - 4]'
|
||
BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default
|
||
section is used (`%ss' for addressing with `%ebp' as the base
|
||
register). INDEX, SCALE are both missing.
|
||
|
||
AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]'
|
||
INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'. All other
|
||
fields are missing. The section register here defaults to `%ds'.
|
||
|
||
AT&T: `foo(,1)'; Intel `[foo]'
|
||
This uses the value pointed to by `foo' as a memory operand. Note
|
||
that BASE and INDEX are both missing, but there is only *one* `,'.
|
||
This is a syntactic exception.
|
||
|
||
AT&T: `%gs:foo'; Intel `gs:foo'
|
||
This selects the contents of the variable `foo' with section
|
||
register SECTION being `%gs'.
|
||
|
||
Absolute (as opposed to PC relative) call and jump operands must be
|
||
prefixed with `*'. If no `*' is specified, `as' always chooses PC
|
||
relative addressing for jump/call labels.
|
||
|
||
Any instruction that has a memory operand *must* specify its size
|
||
(byte, word, or long) with an opcode suffix (`b', `w', or `l',
|
||
respectively).
|
||
|
||
|
||
File: as.info, Node: i386-jumps, Next: i386-Float, Prev: i386-Memory, Up: i386-Dependent
|
||
|
||
Handling of Jump Instructions
|
||
-----------------------------
|
||
|
||
Jump instructions are always optimized to use the smallest possible
|
||
displacements. This is accomplished by using byte (8-bit) displacement
|
||
jumps whenever the target is sufficiently close. If a byte displacement
|
||
is insufficient a long (32-bit) displacement is used. We do not support
|
||
word (16-bit) displacement jumps (i.e. prefixing the jump instruction
|
||
with the `addr16' opcode prefix), since the 80386 insists upon masking
|
||
`%eip' to 16 bits after the word displacement is added.
|
||
|
||
Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz'
|
||
and `loopne' instructions only come in byte displacements, so that if
|
||
you use these instructions (`gcc' does not use them) you may get an
|
||
error message (and incorrect code). The AT&T 80386 assembler tries to
|
||
get around this problem by expanding `jcxz foo' to
|
||
|
||
jcxz cx_zero
|
||
jmp cx_nonzero
|
||
cx_zero: jmp foo
|
||
cx_nonzero:
|
||
|
||
|
||
File: as.info, Node: i386-Float, Next: i386-16bit, Prev: i386-jumps, Up: i386-Dependent
|
||
|
||
Floating Point
|
||
--------------
|
||
|
||
All 80387 floating point types except packed BCD are supported.
|
||
(BCD support may be added without much difficulty). These data types
|
||
are 16-, 32-, and 64- bit integers, and single (32-bit), double
|
||
(64-bit), and extended (80-bit) precision floating point. Each
|
||
supported type has an opcode suffix and a constructor associated with
|
||
it. Opcode suffixes specify operand's data types. Constructors build
|
||
these data types into memory.
|
||
|
||
* Floating point constructors are `.float' or `.single', `.double',
|
||
and `.tfloat' for 32-, 64-, and 80-bit formats. These correspond
|
||
to opcode suffixes `s', `l', and `t'. `t' stands for temporary
|
||
real, and that the 80387 only supports this format via the `fldt'
|
||
(load temporary real to stack top) and `fstpt' (store temporary
|
||
real and pop stack) instructions.
|
||
|
||
* Integer constructors are `.word', `.long' or `.int', and `.quad'
|
||
for the 16-, 32-, and 64-bit integer formats. The corresponding
|
||
opcode suffixes are `s' (single), `l' (long), and `q' (quad). As
|
||
with the temporary real format the 64-bit `q' format is only
|
||
present in the `fildq' (load quad integer to stack top) and
|
||
`fistpq' (store quad integer and pop stack) instructions.
|
||
|
||
Register to register operations do not require opcode suffixes, so
|
||
that `fst %st, %st(1)' is equivalent to `fstl %st, %st(1)'.
|
||
|
||
Since the 80387 automatically synchronizes with the 80386 `fwait'
|
||
instructions are almost never needed (this is not the case for the
|
||
80286/80287 and 8086/8087 combinations). Therefore, `as' suppresses
|
||
the `fwait' instruction whenever it is implicitly selected by one of
|
||
the `fn...' instructions. For example, `fsave' and `fnsave' are
|
||
treated identically. In general, all the `fn...' instructions are made
|
||
equivalent to `f...' instructions. If `fwait' is desired it must be
|
||
explicitly coded.
|
||
|
||
|
||
File: as.info, Node: i386-16bit, Next: i386-Notes, Prev: i386-Float, Up: i386-Dependent
|
||
|
||
Writing 16-bit Code
|
||
-------------------
|
||
|
||
While GAS normally writes only "pure" 32-bit i386 code, it has
|
||
limited support for writing code to run in real mode or in 16-bit
|
||
protected mode code segments. To do this, insert a `.code16' directive
|
||
before the assembly language instructions to be run in 16-bit mode.
|
||
You can switch GAS back to writing normal 32-bit code with the
|
||
`.code32' directive.
|
||
|
||
GAS understands exactly the same assembly language syntax in 16-bit
|
||
mode as in 32-bit mode. The function of any given instruction is
|
||
exactly the same regardless of mode, as long as the resulting object
|
||
code is executed in the mode for which GAS wrote it. So, for example,
|
||
the `ret' mnemonic produces a 32-bit return instruction regardless of
|
||
whether it is to be run in 16-bit or 32-bit mode. (If GAS is in 16-bit
|
||
mode, it will add an operand size prefix to the instruction to force it
|
||
to be a 32-bit return.)
|
||
|
||
This means, for one thing, that you can use GNU CC to write code to
|
||
be run in real mode or 16-bit protected mode. Just insert the statement
|
||
`asm(".code16");' at the beginning of your C source file, and while GNU
|
||
CC will still be generating 32-bit code, GAS will automatically add all
|
||
the necessary size prefixes to make that code run in 16-bit mode. Of
|
||
course, since GNU CC only writes small-model code (it doesn't know how
|
||
to attach segment selectors to pointers like native x86 compilers do),
|
||
any 16-bit code you write with GNU CC will essentially be limited to a
|
||
64K address space. Also, there will be a code size and performance
|
||
penalty due to all the extra address and operand size prefixes GAS has
|
||
to add to the instructions.
|
||
|
||
Note that placing GAS in 16-bit mode does not mean that the resulting
|
||
code will necessarily run on a 16-bit pre-80386 processor. To write
|
||
code that runs on such a processor, you would have to refrain from using
|
||
*any* 32-bit constructs which require GAS to output address or operand
|
||
size prefixes. At the moment this would be rather difficult, because
|
||
GAS currently supports *only* 32-bit addressing modes: when writing
|
||
16-bit code, it *always* outputs address size prefixes for any
|
||
instruction that uses a non-register addressing mode. So you can write
|
||
code that runs on 16-bit processors, but only if that code never
|
||
references memory.
|
||
|
||
|
||
File: as.info, Node: i386-Notes, Prev: i386-16bit, Up: i386-Dependent
|
||
|
||
Notes
|
||
-----
|
||
|
||
There is some trickery concerning the `mul' and `imul' instructions
|
||
that deserves mention. The 16-, 32-, and 64-bit expanding multiplies
|
||
(base opcode `0xf6'; extension 4 for `mul' and 5 for `imul') can be
|
||
output only in the one operand form. Thus, `imul %ebx, %eax' does
|
||
*not* select the expanding multiply; the expanding multiply would
|
||
clobber the `%edx' register, and this would confuse `gcc' output. Use
|
||
`imul %ebx' to get the 64-bit product in `%edx:%eax'.
|
||
|
||
We have added a two operand form of `imul' when the first operand is
|
||
an immediate mode expression and the second operand is a register.
|
||
This is just a shorthand, so that, multiplying `%eax' by 69, for
|
||
example, can be done with `imul $69, %eax' rather than `imul $69, %eax,
|
||
%eax'.
|
||
|
||
|
||
File: as.info, Node: i960-Dependent, Next: M68K-Dependent, Prev: i386-Dependent, Up: Machine Dependencies
|
||
|
||
Intel 80960 Dependent Features
|
||
==============================
|
||
|
||
* Menu:
|
||
|
||
* Options-i960:: i960 Command-line Options
|
||
* Floating Point-i960:: Floating Point
|
||
* Directives-i960:: i960 Machine Directives
|
||
* Opcodes for i960:: i960 Opcodes
|
||
|
||
|
||
File: as.info, Node: Options-i960, Next: Floating Point-i960, Up: i960-Dependent
|
||
|
||
i960 Command-line Options
|
||
-------------------------
|
||
|
||
`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
|
||
Select the 80960 architecture. Instructions or features not
|
||
supported by the selected architecture cause fatal errors.
|
||
|
||
`-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'.
|
||
Synonyms are provided for compatibility with other tools.
|
||
|
||
If you do not specify any of these options, `as' generates code
|
||
for any instruction or feature that is supported by *some* version
|
||
of the 960 (even if this means mixing architectures!). In
|
||
principle, `as' attempts to deduce the minimal sufficient
|
||
processor type if none is specified; depending on the object code
|
||
format, the processor type may be recorded in the object file. If
|
||
it is critical that the `as' output match a specific architecture,
|
||
specify that architecture explicitly.
|
||
|
||
`-b'
|
||
Add code to collect information about conditional branches taken,
|
||
for later optimization using branch prediction bits. (The
|
||
conditional branch instructions have branch prediction bits in the
|
||
CA, CB, and CC architectures.) If BR represents a conditional
|
||
branch instruction, the following represents the code generated by
|
||
the assembler when `-b' is specified:
|
||
|
||
call INCREMENT ROUTINE
|
||
.word 0 # pre-counter
|
||
Label: BR
|
||
call INCREMENT ROUTINE
|
||
.word 0 # post-counter
|
||
|
||
The counter following a branch records the number of times that
|
||
branch was *not* taken; the differenc between the two counters is
|
||
the number of times the branch *was* taken.
|
||
|
||
A table of every such `Label' is also generated, so that the
|
||
external postprocessor `gbr960' (supplied by Intel) can locate all
|
||
the counters. This table is always labelled `__BRANCH_TABLE__';
|
||
this is a local symbol to permit collecting statistics for many
|
||
separate object files. The table is word aligned, and begins with
|
||
a two-word header. The first word, initialized to 0, is used in
|
||
maintaining linked lists of branch tables. The second word is a
|
||
count of the number of entries in the table, which follow
|
||
immediately: each is a word, pointing to one of the labels
|
||
illustrated above.
|
||
|
||
+------------+------------+------------+ ... +------------+
|
||
| | | | | |
|
||
| *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N |
|
||
| | | | | |
|
||
+------------+------------+------------+ ... +------------+
|
||
|
||
__BRANCH_TABLE__ layout
|
||
|
||
The first word of the header is used to locate multiple branch
|
||
tables, since each object file may contain one. Normally the links
|
||
are maintained with a call to an initialization routine, placed at
|
||
the beginning of each function in the file. The GNU C compiler
|
||
generates these calls automatically when you give it a `-b' option.
|
||
For further details, see the documentation of `gbr960'.
|
||
|
||
`-no-relax'
|
||
Normally, Compare-and-Branch instructions with targets that require
|
||
displacements greater than 13 bits (or that have external targets)
|
||
are replaced with the corresponding compare (or `chkbit') and
|
||
branch instructions. You can use the `-no-relax' option to
|
||
specify that `as' should generate errors instead, if the target
|
||
displacement is larger than 13 bits.
|
||
|
||
This option does not affect the Compare-and-Jump instructions; the
|
||
code emitted for them is *always* adjusted when necessary
|
||
(depending on displacement size), regardless of whether you use
|
||
`-no-relax'.
|
||
|
||
|
||
File: as.info, Node: Floating Point-i960, Next: Directives-i960, Prev: Options-i960, Up: i960-Dependent
|
||
|
||
Floating Point
|
||
--------------
|
||
|
||
`as' generates IEEE floating-point numbers for the directives
|
||
`.float', `.double', `.extended', and `.single'.
|
||
|
||
|
||
File: as.info, Node: Directives-i960, Next: Opcodes for i960, Prev: Floating Point-i960, Up: i960-Dependent
|
||
|
||
i960 Machine Directives
|
||
-----------------------
|
||
|
||
`.bss SYMBOL, LENGTH, ALIGN'
|
||
Reserve LENGTH bytes in the bss section for a local SYMBOL,
|
||
aligned to the power of two specified by ALIGN. LENGTH and ALIGN
|
||
must be positive absolute expressions. This directive differs
|
||
from `.lcomm' only in that it permits you to specify an alignment.
|
||
*Note `.lcomm': Lcomm.
|
||
|
||
`.extended FLONUMS'
|
||
`.extended' expects zero or more flonums, separated by commas; for
|
||
each flonum, `.extended' emits an IEEE extended-format (80-bit)
|
||
floating-point number.
|
||
|
||
`.leafproc CALL-LAB, BAL-LAB'
|
||
You can use the `.leafproc' directive in conjunction with the
|
||
optimized `callj' instruction to enable faster calls of leaf
|
||
procedures. If a procedure is known to call no other procedures,
|
||
you may define an entry point that skips procedure prolog code
|
||
(and that does not depend on system-supplied saved context), and
|
||
declare it as the BAL-LAB using `.leafproc'. If the procedure
|
||
also has an entry point that goes through the normal prolog, you
|
||
can specify that entry point as CALL-LAB.
|
||
|
||
A `.leafproc' declaration is meant for use in conjunction with the
|
||
optimized call instruction `callj'; the directive records the data
|
||
needed later to choose between converting the `callj' into a `bal'
|
||
or a `call'.
|
||
|
||
CALL-LAB is optional; if only one argument is present, or if the
|
||
two arguments are identical, the single argument is assumed to be
|
||
the `bal' entry point.
|
||
|
||
`.sysproc NAME, INDEX'
|
||
The `.sysproc' directive defines a name for a system procedure.
|
||
After you define it using `.sysproc', you can use NAME to refer to
|
||
the system procedure identified by INDEX when calling procedures
|
||
with the optimized call instruction `callj'.
|
||
|
||
Both arguments are required; INDEX must be between 0 and 31
|
||
(inclusive).
|
||
|
||
|
||
File: as.info, Node: Opcodes for i960, Prev: Directives-i960, Up: i960-Dependent
|
||
|
||
i960 Opcodes
|
||
------------
|
||
|
||
All Intel 960 machine instructions are supported; *note i960
|
||
Command-line Options: Options-i960. for a discussion of selecting the
|
||
instruction subset for a particular 960 architecture.
|
||
|
||
Some opcodes are processed beyond simply emitting a single
|
||
corresponding instruction: `callj', and Compare-and-Branch or
|
||
Compare-and-Jump instructions with target displacements larger than 13
|
||
bits.
|
||
|
||
* Menu:
|
||
|
||
* callj-i960:: `callj'
|
||
* Compare-and-branch-i960:: Compare-and-Branch
|
||
|
||
|
||
File: as.info, Node: callj-i960, Next: Compare-and-branch-i960, Up: Opcodes for i960
|
||
|
||
`callj'
|
||
.......
|
||
|
||
You can write `callj' to have the assembler or the linker determine
|
||
the most appropriate form of subroutine call: `call', `bal', or
|
||
`calls'. If the assembly source contains enough information--a
|
||
`.leafproc' or `.sysproc' directive defining the operand--then `as'
|
||
translates the `callj'; if not, it simply emits the `callj', leaving it
|
||
for the linker to resolve.
|
||
|
||
|
||
File: as.info, Node: Compare-and-branch-i960, Prev: callj-i960, Up: Opcodes for i960
|
||
|
||
Compare-and-Branch
|
||
..................
|
||
|
||
The 960 architectures provide combined Compare-and-Branch
|
||
instructions that permit you to store the branch target in the lower 13
|
||
bits of the instruction word itself. However, if you specify a branch
|
||
target far enough away that its address won't fit in 13 bits, the
|
||
assembler can either issue an error, or convert your Compare-and-Branch
|
||
instruction into separate instructions to do the compare and the branch.
|
||
|
||
Whether `as' gives an error or expands the instruction depends on
|
||
two choices you can make: whether you use the `-no-relax' option, and
|
||
whether you use a "Compare and Branch" instruction or a "Compare and
|
||
Jump" instruction. The "Jump" instructions are *always* expanded if
|
||
necessary; the "Branch" instructions are expanded when necessary
|
||
*unless* you specify `-no-relax'--in which case `as' gives an error
|
||
instead.
|
||
|
||
These are the Compare-and-Branch instructions, their "Jump" variants,
|
||
and the instruction pairs they may expand into:
|
||
|
||
Compare and
|
||
Branch Jump Expanded to
|
||
------ ------ ------------
|
||
bbc chkbit; bno
|
||
bbs chkbit; bo
|
||
cmpibe cmpije cmpi; be
|
||
cmpibg cmpijg cmpi; bg
|
||
cmpibge cmpijge cmpi; bge
|
||
cmpibl cmpijl cmpi; bl
|
||
cmpible cmpijle cmpi; ble
|
||
cmpibno cmpijno cmpi; bno
|
||
cmpibne cmpijne cmpi; bne
|
||
cmpibo cmpijo cmpi; bo
|
||
cmpobe cmpoje cmpo; be
|
||
cmpobg cmpojg cmpo; bg
|
||
cmpobge cmpojge cmpo; bge
|
||
cmpobl cmpojl cmpo; bl
|
||
cmpoble cmpojle cmpo; ble
|
||
cmpobne cmpojne cmpo; bne
|
||
|
||
|
||
File: as.info, Node: M68K-Dependent, Next: MIPS-Dependent, Prev: i960-Dependent, Up: Machine Dependencies
|
||
|
||
M680x0 Dependent Features
|
||
=========================
|
||
|
||
* Menu:
|
||
|
||
* M68K-Opts:: M680x0 Options
|
||
* M68K-Syntax:: Syntax
|
||
* M68K-Moto-Syntax:: Motorola Syntax
|
||
* M68K-Float:: Floating Point
|
||
* M68K-Directives:: 680x0 Machine Directives
|
||
* M68K-opcodes:: Opcodes
|
||
|
||
|
||
File: as.info, Node: M68K-Opts, Next: M68K-Syntax, Up: M68K-Dependent
|
||
|
||
M680x0 Options
|
||
--------------
|
||
|
||
The Motorola 680x0 version of `as' has a few machine dependent
|
||
options.
|
||
|
||
You can use the `-l' option to shorten the size of references to
|
||
undefined symbols. If you do not use the `-l' option, references to
|
||
undefined symbols are wide enough for a full `long' (32 bits). (Since
|
||
`as' cannot know where these symbols end up, `as' can only allocate
|
||
space for the linker to fill in later. Since `as' does not know how
|
||
far away these symbols are, it allocates as much space as it can.) If
|
||
you use this option, the references are only one word wide (16 bits).
|
||
This may be useful if you want the object file to be as small as
|
||
possible, and you know that the relevant symbols are always less than
|
||
17 bits away.
|
||
|
||
For some configurations, especially those where the compiler normally
|
||
does not prepend an underscore to the names of user variables, the
|
||
assembler requires a `%' before any use of a register name. This is
|
||
intended to let the assembler distinguish between C variables and
|
||
functions named `a0' through `a7', and so on. The `%' is always
|
||
accepted, but is not required for certain configurations, notably
|
||
`sun3'. The `--register-prefix-optional' option may be used to permit
|
||
omitting the `%' even for configurations for which it is normally
|
||
required. If this is done, it will generally be impossible to refer to
|
||
C variables and functions with the same names as register names.
|
||
|
||
Normally the character `|' is treated as a comment character, which
|
||
means that it can not be used in expressions. The `--bitwise-or'
|
||
option turns `|' into a normal character. In this mode, you must
|
||
either use C style comments, or start comments with a `#' character at
|
||
the beginning of a line.
|
||
|
||
If you use an addressing mode with a base register without specifying
|
||
the size, `as' will normally use the full 32 bit value. For example,
|
||
the addressing mode `%a0@(%d0)' is equivalent to `%a0@(%d0:l)'. You
|
||
may use the `--base-size-default-16' option to tell `as' to default to
|
||
using the 16 bit value. In this case, `%a0@(%d0)' is equivalent to
|
||
`%a0@(%d0:w)'. You may use the `--base-size-default-32' option to
|
||
restore the default behaviour.
|
||
|
||
If you use an addressing mode with a displacement, and the value of
|
||
the displacement is not known, `as' will normally assume that the value
|
||
is 32 bits. For example, if the symbol `disp' has not been defined,
|
||
`as' will assemble the addressing mode `%a0@(disp,%d0)' as though
|
||
`disp' is a 32 bit value. You may use the `--disp-size-default-16'
|
||
option to tell `as' to instead assume that the displacement is 16 bits.
|
||
In this case, `as' will assemble `%a0@(disp,%d0)' as though `disp' is
|
||
a 16 bit value. You may use the `--disp-size-default-32' option to
|
||
restore the default behaviour.
|
||
|
||
`as' can assemble code for several different members of the Motorola
|
||
680x0 family. The default depends upon how `as' was configured when it
|
||
was built; normally, the default is to assemble code for the 68020
|
||
microprocessor. The following options may be used to change the
|
||
default. These options control which instructions and addressing modes
|
||
are permitted. The members of the 680x0 family are very similar. For
|
||
detailed information about the differences, see the Motorola manuals.
|
||
|
||
`-m68000'
|
||
`-m68008'
|
||
`-m68302'
|
||
Assemble for the 68000. `-m68008' and `-m68302' are synonyms for
|
||
`-m68000', since the chips are the same from the point of view of
|
||
the assembler.
|
||
|
||
`-m68010'
|
||
Assemble for the 68010.
|
||
|
||
`-m68020'
|
||
Assemble for the 68020. This is normally the default.
|
||
|
||
`-m68030'
|
||
Assemble for the 68030.
|
||
|
||
`-m68040'
|
||
Assemble for the 68040.
|
||
|
||
`-m68060'
|
||
Assemble for the 68060.
|
||
|
||
`-mcpu32'
|
||
`-m68331'
|
||
`-m68332'
|
||
`-m68333'
|
||
`-m68340'
|
||
`-m68360'
|
||
Assemble for the CPU32 family of chips.
|
||
|
||
`-m5200'
|
||
Assemble for the ColdFire family of chips.
|
||
|
||
`-m68881'
|
||
`-m68882'
|
||
Assemble 68881 floating point instructions. This is the default
|
||
for the 68020, 68030, and the CPU32. The 68040 and 68060 always
|
||
support floating point instructions.
|
||
|
||
`-mno-68881'
|
||
Do not assemble 68881 floating point instructions. This is the
|
||
default for 68000 and the 68010. The 68040 and 68060 always
|
||
support floating point instructions, even if this option is used.
|
||
|
||
`-m68851'
|
||
Assemble 68851 MMU instructions. This is the default for the
|
||
68020, 68030, and 68060. The 68040 accepts a somewhat different
|
||
set of MMU instructions; `-m68851' and `-m68040' should not be used
|
||
together.
|
||
|
||
`-mno-68851'
|
||
Do not assemble 68851 MMU instructions. This is the default for
|
||
the 68000, 68010, and the CPU32. The 68040 accepts a somewhat
|
||
different set of MMU instructions.
|
||
|
||
|
||
File: as.info, Node: M68K-Syntax, Next: M68K-Moto-Syntax, Prev: M68K-Opts, Up: M68K-Dependent
|
||
|
||
Syntax
|
||
------
|
||
|
||
This syntax for the Motorola 680x0 was developed at MIT.
|
||
|
||
The 680x0 version of `as' uses instructions names and syntax
|
||
compatible with the Sun assembler. Intervening periods are ignored;
|
||
for example, `movl' is equivalent to `mov.l'.
|
||
|
||
In the following table APC stands for any of the address registers
|
||
(`%a0' through `%a7'), the program counter (`%pc'), the zero-address
|
||
relative to the program counter (`%zpc'), a suppressed address register
|
||
(`%za0' through `%za7'), or it may be omitted entirely. The use of
|
||
SIZE means one of `w' or `l', and it may be omitted, along with the
|
||
leading colon, unless a scale is also specified. The use of SCALE
|
||
means one of `1', `2', `4', or `8', and it may always be omitted along
|
||
with the leading colon.
|
||
|
||
The following addressing modes are understood:
|
||
"Immediate"
|
||
`#NUMBER'
|
||
|
||
"Data Register"
|
||
`%d0' through `%d7'
|
||
|
||
"Address Register"
|
||
`%a0' through `%a7'
|
||
`%a7' is also known as `%sp', i.e. the Stack Pointer. `%a6' is
|
||
also known as `%fp', the Frame Pointer.
|
||
|
||
"Address Register Indirect"
|
||
`%a0@' through `%a7@'
|
||
|
||
"Address Register Postincrement"
|
||
`%a0@+' through `%a7@+'
|
||
|
||
"Address Register Predecrement"
|
||
`%a0@-' through `%a7@-'
|
||
|
||
"Indirect Plus Offset"
|
||
`APC@(NUMBER)'
|
||
|
||
"Index"
|
||
`APC@(NUMBER,REGISTER:SIZE:SCALE)'
|
||
|
||
The NUMBER may be omitted.
|
||
|
||
"Postindex"
|
||
`APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)'
|
||
|
||
The ONUMBER or the REGISTER, but not both, may be omitted.
|
||
|
||
"Preindex"
|
||
`APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)'
|
||
|
||
The NUMBER may be omitted. Omitting the REGISTER produces the
|
||
Postindex addressing mode.
|
||
|
||
"Absolute"
|
||
`SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'.
|
||
|