f8b38a76cf
PR: kern/24231 Submitted by: KIYOHARA Takashi <kiyohara@kk.iij4u.or.jp>
451 lines
12 KiB
C
451 lines
12 KiB
C
/* $NetBSD: x1226.c,v 1.4 2004/02/13 20:12:00 shige Exp $ */
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/*
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* Copyright (c) 2003 Shigeyuki Fukushima.
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* All rights reserved.
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*
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* Written by Shigeyuki Fukushima for the NetBSD Project.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Shigeyuki Fukushima.
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* 4. The name of Shigeyuki Fukushima may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY SHIGEYUKI FUKUSHIMA ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL SHIGEYUKI FUKUSHIMA
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: x1226.c,v 1.4 2004/02/13 20:12:00 shige Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/fcntl.h>
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#include <sys/uio.h>
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#include <sys/conf.h>
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#include <sys/event.h>
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#include <dev/clock_subr.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/x1226reg.h>
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struct xrtc_softc {
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struct device sc_dev;
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i2c_tag_t sc_tag;
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int sc_address;
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int sc_open;
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struct todr_chip_handle sc_todr;
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};
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static void xrtc_attach(struct device *, struct device *, void *);
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static int xrtc_match(struct device *, struct cfdata *, void *);
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CFATTACH_DECL(xrtc, sizeof(struct xrtc_softc),
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xrtc_match, xrtc_attach, NULL, NULL);
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extern struct cfdriver xrtc_cd;
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dev_type_open(xrtc_open);
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dev_type_close(xrtc_close);
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dev_type_read(xrtc_read);
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dev_type_write(xrtc_write);
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const struct cdevsw xrtc_cdevsw = {
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xrtc_open, xrtc_close, xrtc_read, xrtc_write,
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noioctl, nostop, notty, nopoll, nommap, nokqfilter
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};
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static int xrtc_clock_read(struct xrtc_softc *, struct clock_ymdhms *);
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static int xrtc_clock_write(struct xrtc_softc *, struct clock_ymdhms *);
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static int xrtc_gettime(struct todr_chip_handle *, struct timeval *);
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static int xrtc_settime(struct todr_chip_handle *, struct timeval *);
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static int xrtc_getcal(struct todr_chip_handle *, int *);
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static int xrtc_setcal(struct todr_chip_handle *, int);
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/*
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* xrtc_match()
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*/
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static int
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xrtc_match(struct device *parent, struct cfdata *cf, void *arg)
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{
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struct i2c_attach_args *ia = arg;
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/* match only this RTC devices */
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if (ia->ia_addr == X1226_ADDR)
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return (1);
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return (0);
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}
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/*
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* xrtc_attach()
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*/
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static void
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xrtc_attach(struct device *parent, struct device *self, void *arg)
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{
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struct xrtc_softc *sc = (struct xrtc_softc *)self;
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struct i2c_attach_args *ia = arg;
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aprint_naive(": Real-time Clock/NVRAM\n");
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aprint_normal(": Xicor X1226 Real-time Clock/NVRAM\n");
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sc->sc_tag = ia->ia_tag;
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sc->sc_address = ia->ia_addr;
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sc->sc_open = 0;
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sc->sc_todr.cookie = sc;
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sc->sc_todr.todr_gettime = xrtc_gettime;
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sc->sc_todr.todr_settime = xrtc_settime;
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sc->sc_todr.todr_getcal = xrtc_getcal;
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sc->sc_todr.todr_setcal = xrtc_setcal;
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sc->sc_todr.todr_setwen = NULL;
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todr_attach(&sc->sc_todr);
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}
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/*ARGSUSED*/
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int
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xrtc_open(dev_t dev, int flag, int fmt, struct proc *p)
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{
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struct xrtc_softc *sc;
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if ((sc = device_lookup(&xrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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/* XXX: Locking */
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if (sc->sc_open)
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return (EBUSY);
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sc->sc_open = 1;
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return (0);
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}
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/*ARGSUSED*/
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int
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xrtc_close(dev_t dev, int flag, int fmt, struct proc *p)
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{
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struct xrtc_softc *sc;
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if ((sc = device_lookup(&xrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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sc->sc_open = 0;
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return (0);
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}
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/*ARGSUSED*/
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int
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xrtc_read(dev_t dev, struct uio *uio, int flags)
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{
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struct xrtc_softc *sc;
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u_int8_t ch, cmdbuf[2];
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int addr, error;
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if ((sc = device_lookup(&xrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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if (uio->uio_offset >= X1226_NVRAM_SIZE)
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return (EINVAL);
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if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
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return (error);
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while (uio->uio_resid && uio->uio_offset < X1226_NVRAM_SIZE) {
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addr = (int)uio->uio_offset + X1226_NVRAM_START;
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cmdbuf[0] = (addr >> 8) && 0xff;
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cmdbuf[1] = addr && 0xff;
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if ((error = iic_exec(sc->sc_tag,
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I2C_OP_READ_WITH_STOP,
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sc->sc_address, cmdbuf, 2, &ch, 1, 0)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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printf("%s: xrtc_read: read failed at 0x%x\n",
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sc->sc_dev.dv_xname, (int)uio->uio_offset);
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return (error);
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}
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if ((error = uiomove(&ch, 1, uio)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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return (error);
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}
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}
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iic_release_bus(sc->sc_tag, 0);
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return (0);
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}
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/*ARGSUSED*/
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int
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xrtc_write(dev_t dev, struct uio *uio, int flags)
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{
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struct xrtc_softc *sc;
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u_int8_t cmdbuf[3];
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int addr, error;
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if ((sc = device_lookup(&xrtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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if (uio->uio_offset >= X1226_NVRAM_SIZE)
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return (EINVAL);
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if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
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return (error);
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while (uio->uio_resid && uio->uio_offset < X1226_NVRAM_SIZE) {
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addr = (int)uio->uio_offset + X1226_NVRAM_START;
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cmdbuf[0] = (addr >> 8) && 0xff;
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cmdbuf[1] = addr && 0xff;
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if ((error = uiomove(&cmdbuf[2], 1, uio)) != 0) {
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break;
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}
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if ((error = iic_exec(sc->sc_tag,
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uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
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sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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printf("%s: xrtc_write: write failed at 0x%x\n",
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sc->sc_dev.dv_xname, (int)uio->uio_offset);
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return (error);
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}
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}
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iic_release_bus(sc->sc_tag, 0);
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return (0);
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}
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static int
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xrtc_gettime(struct todr_chip_handle *ch, struct timeval *tv)
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{
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struct xrtc_softc *sc = ch->cookie;
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struct clock_ymdhms dt, check;
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int retries;
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memset(&dt, 0, sizeof(dt));
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memset(&check, 0, sizeof(check));
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retries = 5;
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do {
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xrtc_clock_read(sc, &dt);
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xrtc_clock_read(sc, &check);
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} while (memcmp(&dt, &check, sizeof(check)) != 0 && --retries);
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tv->tv_sec = clock_ymdhms_to_secs(&dt);
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tv->tv_usec = 0;
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return (0);
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}
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static int
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xrtc_settime(struct todr_chip_handle *ch, struct timeval *tv)
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{
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struct xrtc_softc *sc = ch->cookie;
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struct clock_ymdhms dt;
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clock_secs_to_ymdhms(tv->tv_sec, &dt);
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if (xrtc_clock_write(sc, &dt) == 0)
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return (-1);
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return (0);
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}
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static int
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xrtc_setcal(struct todr_chip_handle *ch, int cal)
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{
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return (EOPNOTSUPP);
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}
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static int
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xrtc_getcal(struct todr_chip_handle *ch, int *cal)
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{
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return (EOPNOTSUPP);
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}
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static int
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xrtc_clock_read(struct xrtc_softc *sc, struct clock_ymdhms *dt)
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{
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int i = 0;
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u_int8_t bcd[X1226_REG_RTC_SIZE], cmdbuf[2];
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: xrtc_clock_read: failed to acquire I2C bus\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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/* Read each RTC register in order */
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for (i = 0 ; i < X1226_REG_RTC_SIZE ; i++) {
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int addr = i + X1226_REG_RTC_BASE;
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cmdbuf[0] = (addr >> 8) & 0xff;
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cmdbuf[1] = addr & 0xff;
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if (iic_exec(sc->sc_tag,
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I2C_OP_READ_WITH_STOP,
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sc->sc_address, cmdbuf, 2,
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&bcd[i], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: xrtc_clock_read: failed to read rtc "
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"at 0x%x\n", sc->sc_dev.dv_xname, i);
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return (0);
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}
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}
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/* Done with I2C */
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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/*
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* Convert the X1226's register bcd values
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*/
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dt->dt_sec = FROMBCD(bcd[X1226_REG_SC - X1226_REG_RTC_BASE]
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& X1226_REG_SC_MASK);
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dt->dt_min = FROMBCD(bcd[X1226_REG_MN - X1226_REG_RTC_BASE]
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& X1226_REG_MN_MASK);
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if (!(bcd[X1226_REG_HR - X1226_REG_RTC_BASE] & X1226_FLAG_HR_24H)) {
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dt->dt_hour = FROMBCD(bcd[X1226_REG_HR - X1226_REG_RTC_BASE]
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& X1226_REG_HR12_MASK);
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if (bcd[X1226_REG_HR - X1226_REG_RTC_BASE] & X1226_FLAG_HR_12HPM) {
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dt->dt_hour += 12;
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}
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} else {
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dt->dt_hour = FROMBCD(bcd[X1226_REG_HR - X1226_REG_RTC_BASE]
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& X1226_REG_HR24_MASK);
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}
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dt->dt_wday = FROMBCD(bcd[X1226_REG_DW - X1226_REG_RTC_BASE]
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& X1226_REG_DT_MASK);
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dt->dt_day = FROMBCD(bcd[X1226_REG_DT - X1226_REG_RTC_BASE]
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& X1226_REG_DT_MASK);
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dt->dt_mon = FROMBCD(bcd[X1226_REG_MO - X1226_REG_RTC_BASE]
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& X1226_REG_MO_MASK);
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dt->dt_year = FROMBCD(bcd[X1226_REG_YR - X1226_REG_RTC_BASE]
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& X1226_REG_YR_MASK);
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dt->dt_year += FROMBCD(bcd[X1226_REG_Y2K - X1226_REG_RTC_BASE]
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& X1226_REG_Y2K_MASK) * 100;
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return (1);
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}
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static int
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xrtc_clock_write(struct xrtc_softc *sc, struct clock_ymdhms *dt)
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{
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int i = 0, addr;
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u_int8_t bcd[X1226_REG_RTC_SIZE], cmdbuf[3];
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/*
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* Convert our time to bcd values
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*/
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bcd[X1226_REG_SC - X1226_REG_RTC_BASE] = TOBCD(dt->dt_sec);
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bcd[X1226_REG_MN - X1226_REG_RTC_BASE] = TOBCD(dt->dt_min);
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bcd[X1226_REG_HR - X1226_REG_RTC_BASE] = TOBCD(dt->dt_hour)
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| X1226_FLAG_HR_24H;
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bcd[X1226_REG_DW - X1226_REG_RTC_BASE] = TOBCD(dt->dt_wday);
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bcd[X1226_REG_DT - X1226_REG_RTC_BASE] = TOBCD(dt->dt_day);
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bcd[X1226_REG_MO - X1226_REG_RTC_BASE] = TOBCD(dt->dt_mon);
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bcd[X1226_REG_YR - X1226_REG_RTC_BASE] = TOBCD(dt->dt_year % 100);
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bcd[X1226_REG_Y2K - X1226_REG_RTC_BASE] = TOBCD(dt->dt_year / 100);
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: xrtc_clock_write: failed to acquire I2C bus\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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/* Unlock register: Write Enable Latch */
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addr = X1226_REG_SR;
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cmdbuf[0] = ((addr >> 8) & 0xff);
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cmdbuf[1] = (addr & 0xff);
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cmdbuf[2] = X1226_FLAG_SR_WEL;
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if (iic_exec(sc->sc_tag,
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I2C_OP_WRITE_WITH_STOP,
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sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0) != 0) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: xrtc_clock_write: "
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"failed to write-unlock status register(WEL=1)\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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/* Unlock register: Register Write Enable Latch */
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addr = X1226_REG_SR;
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cmdbuf[0] = ((addr >> 8) & 0xff);
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cmdbuf[1] = (addr & 0xff);
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cmdbuf[2] = X1226_FLAG_SR_WEL | X1226_FLAG_SR_RWEL;
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if (iic_exec(sc->sc_tag,
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I2C_OP_WRITE_WITH_STOP,
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sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0) != 0) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: xrtc_clock_write: "
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"failed to write-unlock status register(RWEL=1)\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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/* Write each RTC register in reverse order */
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for (i = (X1226_REG_RTC_SIZE - 1) ; i >= 0; i--) {
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int addr = i + X1226_REG_RTC_BASE;
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cmdbuf[0] = ((addr >> 8) & 0xff);
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cmdbuf[1] = (addr & 0xff);
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if (iic_exec(sc->sc_tag,
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I2C_OP_WRITE_WITH_STOP,
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sc->sc_address, cmdbuf, 2,
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&bcd[i], 1, I2C_F_POLL)) {
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/* Lock register: WEL/RWEL off */
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addr = X1226_REG_SR;
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cmdbuf[0] = ((addr >> 8) & 0xff);
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cmdbuf[1] = (addr & 0xff);
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cmdbuf[2] = 0;
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iic_exec(sc->sc_tag,
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I2C_OP_WRITE_WITH_STOP,
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sc->sc_address, cmdbuf, 2,
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&cmdbuf[2], 1, 0);
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: xrtc_clock_write: failed to write rtc "
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"at 0x%x\n", sc->sc_dev.dv_xname, i);
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return (0);
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}
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}
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/* Lock register: WEL/RWEL off */
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addr = X1226_REG_SR;
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cmdbuf[0] = ((addr >> 8) & 0xff);
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cmdbuf[1] = (addr & 0xff);
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cmdbuf[2] = 0;
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if (iic_exec(sc->sc_tag,
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I2C_OP_WRITE_WITH_STOP,
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sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0) != 0) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: xrtc_clock_write: "
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"failed to write-lock status register\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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return (1);
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}
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