810 lines
19 KiB
C
810 lines
19 KiB
C
/* $NetBSD: zs.c,v 1.13 1997/06/15 20:34:15 scottr Exp $ */
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/*
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* Copyright (c) 1995 Gordon W. Ross
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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* 4. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Gordon Ross
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Zilog Z8530 Dual UART driver (machine-dependent part)
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*
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* Runs two serial lines per chip using slave drivers.
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* Plain tty/async lines use the zs_async slave.
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* Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/device.h>
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/ioctl.h>
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#include <sys/tty.h>
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#include <sys/time.h>
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#include <sys/kernel.h>
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#include <sys/syslog.h>
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#include <dev/cons.h>
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#include "z8530reg.h"
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#include <machine/z8530var.h>
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#include <machine/autoconf.h>
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#include <machine/cpu.h>
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#include <machine/viareg.h>
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/*
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* XXX: Hard code this to make console init easier...
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*/
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#define NZSC 1 /* XXX */
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/*
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* Define interrupt levels.
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*/
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#define ZSHARD_PRI 6 /* Wired on the CPU board... */
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#define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */
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/* The layout of this is hardware-dependent (padding, order). */
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struct zschan {
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volatile u_char zc_csr; /* ctrl,status, and indirect access */
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u_char zc_xxx0;
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u_char zc_xxx1;
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u_char zc_xxx2;
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volatile u_char zc_data; /* data */
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u_char zc_xxx3;
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u_char zc_xxx4;
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u_char zc_xxx5;
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};
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/*
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* The zsdevice structure is not used on the mac68k port as the
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* chip is wired up weird. Channel B & A are interspursed with
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* the data & control bytes
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struct zsdevice {
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/! Yes, they are backwards. !/
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struct zschan zs_chan_b;
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struct zschan zs_chan_a;
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};
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*/
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/* Saved PROM mappings */
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static char *zsaddr[NZSC]; /* See zs_init() */
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/* Flags from cninit() */
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static int zs_hwflags[NZSC][2];
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/* Default speed for each channel */
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static int zs_defspeed[NZSC][2] = {
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{ 9600, /* tty00 */
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9600 }, /* tty01 */
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};
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/* console stuff */
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void *zs_conschan = 0;
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int zs_consunit;
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/* device that the console is attached to--if serial. */
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dev_t mac68k_zsdev;
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/* Mac stuff, some vestages of old mac serial driver here */
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volatile unsigned char *sccA = 0;
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static struct zschan *zs_get_chan_addr __P((int zsc_unit, int channel));
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void zs_init __P((void));
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static struct zschan *
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zs_get_chan_addr(zsc_unit, channel)
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int zsc_unit, channel;
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{
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char *addr;
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struct zschan *zc;
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if (zsc_unit >= NZSC)
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return NULL;
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addr = zsaddr[zsc_unit];
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if (addr == NULL)
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return NULL;
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if (channel == 0) {
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zc = (struct zschan *)(addr +2);
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/* handle the fact the ports are intertwined. */
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} else {
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zc = (struct zschan *)(addr);
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}
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return (zc);
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}
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/* Find PROM mappings (for console support). */
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static int zsinited = 0; /* 0 = not, 1 = inited, not attached, 2= attached */
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void
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zs_init()
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{
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if ((zsinited == 2)&&(zsaddr[0] != (char *) sccA))
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panic("Moved zs0 address after attached!");
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zsaddr[0] = (char *) sccA;
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zsinited = 1;
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if (zs_conschan != 0){ /* we might have moved io under the console */
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zs_conschan = zs_get_chan_addr(0, zs_consunit);
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/* so recalc the console port */
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}
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}
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/*
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* Even though zsparam will set up the clock multiples, etc., we
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* still set them here as: 1) mice & keyboards don't use zsparam,
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* and 2) the console stuff uses these defaults before device
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* attach.
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*/
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static u_char zs_init_reg[16] = {
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0, /* 0: CMD (reset, etc.) */
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ZSWR1_RIE | ZSWR1_TIE | ZSWR1_SIE,
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0x18 + ZSHARD_PRI, /* IVECT */
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ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
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ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
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ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
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0, /* 6: TXSYNC/SYNCLO */
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0, /* 7: RXSYNC/SYNCHI */
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0, /* 8: alias for data port */
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ZSWR9_MASTER_IE,
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0, /*10: Misc. TX/RX control bits */
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ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
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14, /*12: BAUDLO (default=9600) */
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0, /*13: BAUDHI (default=9600) */
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ZSWR14_BAUD_ENA,
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ZSWR15_BREAK_IE | ZSWR15_DCD_IE | ZSWR15_CTS_IE,
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};
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/****************************************************************
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* Autoconfig
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****************************************************************/
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/* Definition of the driver for autoconfig. */
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static int zsc_match __P((struct device *, struct cfdata *, void *));
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static void zsc_attach __P((struct device *, struct device *, void *));
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static int zsc_print __P((void *aux, const char *name));
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struct cfattach zsc_ca = {
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sizeof(struct zsc_softc), zsc_match, zsc_attach
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};
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struct cfdriver zsc_cd = {
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NULL, "zsc", DV_DULL
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};
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int zshard __P((void *));
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int zssoft __P((void *));
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/*
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* Is the zs chip present?
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*/
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static int
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zsc_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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return 1;
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}
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static int
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zsc_print(aux, name)
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void *aux;
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const char *name;
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{
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struct zsc_attach_args *args = aux;
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if (name != NULL)
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printf("%s: ", name);
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if (args->channel != -1)
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printf(" channel %d", args->channel);
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return UNCONF;
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}
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/*
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* Attach a found zs.
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*
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* Match slave number to zs unit number, so that misconfiguration will
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* not set up the keyboard as ttya, etc.
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*/
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static void
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zsc_attach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct zsc_softc *zsc = (void *) self;
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struct zsc_attach_args zsc_args;
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volatile struct zschan *zc;
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struct zs_chanstate *cs;
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int zsc_unit, channel;
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int reset, s;
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int chip = 0; /* XXX quiet bogus gcc warning */
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if (!zsinited) zs_init();
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zsinited = 2;
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zsc_unit = zsc->zsc_dev.dv_unit;
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/* Make sure everything's inited ok. */
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if (zsaddr[zsc_unit] == NULL)
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panic("zs_attach: zs%d not mapped\n", zsc_unit);
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/*
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* Initialize software state for each channel.
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*/
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for (channel = 0; channel < 2; channel++) {
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cs = &zsc->zsc_cs[channel];
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zc = zs_get_chan_addr(zsc_unit, channel);
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cs->cs_reg_csr = &zc->zc_csr;
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cs->cs_reg_data = &zc->zc_data;
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cs->cs_channel = channel;
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cs->cs_private = NULL;
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cs->cs_ops = &zsops_null;
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/* Define BAUD rate clock for the MI code. */
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cs->cs_pclk_div16 = mac68k_machine.sccClkConst*2;
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cs->cs_csource = 0;
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cs->cs_psource = 0;
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cs->cs_defspeed = zs_defspeed[zsc_unit][channel];
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bcopy(zs_init_reg, cs->cs_creg, 16);
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bcopy(zs_init_reg, cs->cs_preg, 16);
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/*
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* Clear the master interrupt enable.
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* The INTENA is common to both channels,
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* so just do it on the A channel.
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*/
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if (channel == 0) {
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zs_write_reg(cs, 9, 0);
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chip = 0; /* We'll turn chip checking on post 1.2 */
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printf(" chip type %d \n",chip);
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}
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cs->cs_chip = chip;
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/*
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* Look for a child driver for this channel.
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* The child attach will setup the hardware.
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*/
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zsc_args.channel = channel;
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zsc_args.hwflags = zs_hwflags[zsc_unit][channel];
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if (!config_found(self, (void *) &zsc_args, zsc_print)) {
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/* No sub-driver. Just reset it. */
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reset = (channel == 0) ?
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ZSWR9_A_RESET : ZSWR9_B_RESET;
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s = splzs();
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zs_write_reg(cs, 9, reset);
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splx(s);
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}
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}
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/*
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* Set the master interrupt enable and interrupt vector.
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* (common to both channels, do it on A)
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*/
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cs = &zsc->zsc_cs[0];
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s = splzs();
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/* interrupt vector */
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zs_write_reg(cs, 2, zs_init_reg[2]);
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/* master interrupt control (enable) */
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zs_write_reg(cs, 9, zs_init_reg[9]);
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splx(s);
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}
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void
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zstty_mdattach(zsc, zst, cs, tp)
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struct zsc_softc *zsc;
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struct zstty_softc *zst;
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struct zs_chanstate *cs;
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struct tty *tp;
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{
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int theflags;
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zst->zst_resetdef = 0;
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cs->cs_clock_count = 3; /* internal + externals */
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cs->cs_cclk_flag = 0; /* Not doing anything fancy by default */
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cs->cs_pclk_flag = 0;
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cs->cs_clocks[0].clk = mac68k_machine.sccClkConst*32;
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cs->cs_clocks[0].flags = ZSC_RTXBRG; /* allowing divide by 16 will
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melt the driver! */
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cs->cs_clocks[1].flags = ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN;
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cs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE;
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if (zst->zst_dev.dv_unit == 0) {
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theflags = mac68k_machine.modem_flags;
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cs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;
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cs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;
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} else if (zst->zst_dev.dv_unit == 1) {
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theflags = mac68k_machine.print_flags;
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cs->cs_clocks[1].flags = ZSC_VARIABLE;
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/*
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* Yes, we aren't defining ANY clock source enables for the
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* printer's DCD clock in. The hardware won't let us
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* use it. But a clock will freak out the chip, so we
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* let you set it, telling us to bar interrupts on the line.
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*/
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cs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;
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cs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;
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} else
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theflags = 0;
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if (cs->cs_clocks[1].clk)
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zst->zst_hwflags |= ZS_HWFLAG_IGDCD;
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if (cs->cs_clocks[2].clk)
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zst->zst_hwflags |= ZS_HWFLAG_IGCTS;
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if (theflags & ZSMAC_RAW) {
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zst->zst_cflag = ZSTTY_RAW_CFLAG;
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zst->zst_iflag = ZSTTY_RAW_IFLAG;
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zst->zst_lflag = ZSTTY_RAW_LFLAG;
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zst->zst_oflag = ZSTTY_RAW_OFLAG;
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printf(" (raw defaults)");
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}
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if (theflags & ZSMAC_LOCALTALK) {
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printf(" shielding from LocalTalk");
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zst->zst_ospeed = tp->t_ospeed = 1;
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zst->zst_ispeed = tp->t_ispeed = 1;
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cs->cs_defspeed = 1;
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cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;
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cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;
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zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
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zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
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/*
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* If we might have LocalTalk, then make sure we have the
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* Baud rate low-enough to not do any damage.
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*/
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}
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/* For the mac, we have rtscts = check CTS for output control, no
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* input control. mdmbuf means check DCD for output, and use DTR
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* for input control. mdmbuf & rtscts means use CTS for output
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* control, and DTR for input control. */
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zst->zst_hwimasks[1] = 0;
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zst->zst_hwimasks[2] = ZSWR5_DTR;
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zst->zst_hwimasks[3] = ZSWR5_DTR;
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}
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int
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zsmdioctl(tp, com, data, flag, p)
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struct tty *tp;
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u_long com;
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caddr_t data;
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int flag;
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struct proc *p;
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{
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return (-1);
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}
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void
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zsmd_setclock(cs)
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struct zs_chanstate *cs;
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{
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if (cs->cs_channel != 0)
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return;
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/*
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* If the new clock has the external bit set, then select the
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* external source.
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*/
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via_set_modem((cs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0);
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}
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int
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zshard(arg)
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void *arg;
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{
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struct zsc_softc *zsc;
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int unit, rval;
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#ifdef ZSMACDEBUG
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itecnputc(mac68k_zsdev, 'Z');
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#endif
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rval = 0;
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unit = zsc_cd.cd_ndevs;
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while (--unit >= 0) {
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zsc = zsc_cd.cd_devs[unit];
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if (zsc != NULL) {
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rval |= zsc_intr_hard(zsc);
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}
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}
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#ifdef ZSMACDEBUG
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itecnputc(mac68k_zsdev, '\n');
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#endif
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return (rval);
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}
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int zssoftpending;
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void
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zsc_req_softint(zsc)
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struct zsc_softc *zsc;
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{
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if (zssoftpending == 0) {
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/* We are at splzs here, so no need to lock. */
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zssoftpending = ZSSOFT_PRI;
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/* isr_soft_request(ZSSOFT_PRI); */
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setsoftserial();
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}
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}
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int
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zssoft(arg)
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void *arg;
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{
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struct zsc_softc *zsc;
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int unit;
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/* This is not the only ISR on this IPL. */
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if (zssoftpending == 0)
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return (0);
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/*
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* The soft intr. bit will be set by zshard only if
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* the variable zssoftpending is zero. The order of
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* these next two statements prevents our clearing
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* the soft intr bit just after zshard has set it.
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*/
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/* isr_soft_clear(ZSSOFT_PRI); */
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zssoftpending = 0;
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/* Do ttya/ttyb first, because they go faster. */
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unit = zsc_cd.cd_ndevs;
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while (--unit >= 0) {
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zsc = zsc_cd.cd_devs[unit];
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if (zsc != NULL) {
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(void) zsc_intr_soft(zsc);
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}
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}
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return (1);
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}
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/*
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* Read or write the chip with suitable delays.
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*/
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#define ZS_DELAY()
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/*
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* MacII hardware has the delay built in. No need for extra delay. :-)
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*/
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u_char
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zs_read_reg(cs, reg)
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struct zs_chanstate *cs;
|
|
u_char reg;
|
|
{
|
|
u_char val;
|
|
|
|
*cs->cs_reg_csr = reg;
|
|
ZS_DELAY();
|
|
val = *cs->cs_reg_csr;
|
|
ZS_DELAY();
|
|
return val;
|
|
}
|
|
|
|
void
|
|
zs_write_reg(cs, reg, val)
|
|
struct zs_chanstate *cs;
|
|
u_char reg, val;
|
|
{
|
|
*cs->cs_reg_csr = reg;
|
|
ZS_DELAY();
|
|
*cs->cs_reg_csr = val;
|
|
ZS_DELAY();
|
|
}
|
|
|
|
u_char zs_read_csr(cs)
|
|
struct zs_chanstate *cs;
|
|
{
|
|
register u_char v;
|
|
|
|
v = (*cs->cs_reg_csr) ^ ZSRR0_CTS;
|
|
/* make up for the fact CTS is wired backwards */
|
|
ZS_DELAY();
|
|
return v;
|
|
}
|
|
|
|
u_char zs_read_data(cs)
|
|
struct zs_chanstate *cs;
|
|
{
|
|
register u_char v;
|
|
|
|
v = *cs->cs_reg_data;
|
|
ZS_DELAY();
|
|
return v;
|
|
}
|
|
|
|
void zs_write_csr(cs, val)
|
|
struct zs_chanstate *cs;
|
|
u_char val;
|
|
{
|
|
*cs->cs_reg_csr = val;
|
|
ZS_DELAY();
|
|
}
|
|
|
|
void zs_write_data(cs, val)
|
|
struct zs_chanstate *cs;
|
|
u_char val;
|
|
{
|
|
*cs->cs_reg_data = val;
|
|
ZS_DELAY();
|
|
}
|
|
|
|
/****************************************************************
|
|
* Console support functions (Originally Sun3 specific!)
|
|
* Now works w/ just mac68k port!
|
|
****************************************************************/
|
|
|
|
#define zscnpollc nullcnpollc
|
|
cons_decl(zs);
|
|
|
|
static void zs_putc __P((register volatile struct zschan *, int));
|
|
static int zs_getc __P((register volatile struct zschan *));
|
|
static void zscnsetup __P((void));
|
|
extern int zsopen __P(( dev_t dev, int flags, int mode, struct proc *p));
|
|
|
|
/*
|
|
* Console functions.
|
|
*/
|
|
|
|
/*
|
|
* This code modled after the zs_setparam routine in zskgdb
|
|
* It sets the console unit to a known state so we can output
|
|
* correctly.
|
|
*/
|
|
static void
|
|
zscnsetup()
|
|
{
|
|
struct zs_chanstate cs;
|
|
struct zschan *zc;
|
|
int tconst, s;
|
|
|
|
/* Setup temporary chanstate. */
|
|
bzero((caddr_t)&cs, sizeof(cs));
|
|
zc = zs_conschan;
|
|
cs.cs_reg_csr = &zc->zc_csr;
|
|
cs.cs_reg_data = &zc->zc_data;
|
|
cs.cs_channel = zs_consunit;
|
|
|
|
bcopy(zs_init_reg, cs.cs_preg, 16);
|
|
tconst = BPS_TO_TCONST(mac68k_machine.sccClkConst*2, zs_defspeed[0][zs_consunit]);
|
|
cs.cs_preg[5] |= ZSWR5_DTR | ZSWR5_RTS;
|
|
cs.cs_preg[1] = 0; /* don't enable interrupts */
|
|
cs.cs_preg[12] = tconst;
|
|
cs.cs_preg[13] = tconst >> 8;
|
|
|
|
s = splhigh();
|
|
zs_loadchannelregs(&cs);
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* zscnprobe is the routine which gets called as the kernel is trying to
|
|
* figure out where the console should be. Each io driver which might
|
|
* be the console (as defined in mac68k/conf.c) gets probed. The probe
|
|
* fills in the consdev structure. Important parts are the device #,
|
|
* and the console priority. Values are CN_DEAD (don't touch me),
|
|
* CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL
|
|
* (the video, better than CN_NORMAL), and CN_REMOTE (pick me!)
|
|
*
|
|
* As the mac's a bit different, we do extra work here. We mainly check
|
|
* to see if we have serial echo going on, and if the tty's are supposed
|
|
* to default to raw or not.
|
|
*/
|
|
void
|
|
zscnprobe(struct consdev * cp)
|
|
{
|
|
extern u_long IOBase;
|
|
int maj, unit;
|
|
|
|
for (maj = 0; maj < nchrdev; maj++) {
|
|
if (cdevsw[maj].d_open == zsopen) {
|
|
break;
|
|
}
|
|
}
|
|
if (maj == nchrdev) {
|
|
/* no console entry for us */
|
|
if (mac68k_machine.serial_boot_echo) {
|
|
mac68k_set_io_offsets(IOBase);
|
|
zs_conschan = (struct zschan *) -1; /* dummy flag for zs_init() */
|
|
zs_consunit = 1;
|
|
zs_hwflags[0][zs_consunit] = ZS_HWFLAG_CONSOLE;
|
|
zs_init();
|
|
zscnsetup();
|
|
}
|
|
return;
|
|
}
|
|
|
|
cp->cn_pri = CN_NORMAL; /* Lower than CN_INTERNAL */
|
|
if (mac68k_machine.serial_console != 0) {
|
|
cp->cn_pri = CN_REMOTE; /* Higher than CN_INTERNAL */
|
|
mac68k_machine.serial_boot_echo =0;
|
|
}
|
|
|
|
unit = (mac68k_machine.serial_console == 1) ? 0 : 1;
|
|
zs_consunit = unit;
|
|
|
|
mac68k_zsdev = cp->cn_dev = makedev(maj, unit);
|
|
|
|
if (mac68k_machine.serial_boot_echo) {
|
|
/*
|
|
* at this point, we know that we don't have a serial
|
|
* console, but are doing echo
|
|
*/
|
|
mac68k_set_io_offsets(IOBase);
|
|
zs_conschan = (struct zschan *) -1; /* dummy flag for zs_init() */
|
|
zs_consunit = 1;
|
|
zs_hwflags[0][zs_consunit] = ZS_HWFLAG_CONSOLE;
|
|
zs_init();
|
|
zscnsetup();
|
|
}
|
|
return;
|
|
}
|
|
|
|
void
|
|
zscninit(struct consdev * cp)
|
|
{
|
|
extern u_long IOBase;
|
|
int chan = minor(cp->cn_dev & 1);
|
|
|
|
mac68k_set_io_offsets(IOBase);
|
|
zs_conschan = (struct zschan *) -1;
|
|
zs_consunit = chan;
|
|
zs_hwflags[0][zs_consunit] = ZS_HWFLAG_CONSOLE;
|
|
#ifdef ZS_CONSOLE_ABORT
|
|
zs_hwflags[0][zs_consunit] |= ZS_HWFLAG_CONABRT;
|
|
#endif
|
|
zs_init();
|
|
/*
|
|
* zsinit will set up the addresses of the scc. It will also, if
|
|
* zs_conschan != 0, calculate the new address of the conschan for
|
|
* unit zs_consunit. So zs_init implicitly sets zs_conschan to the right
|
|
* number. :-)
|
|
*/
|
|
zscnsetup();
|
|
printf("\nNetBSD/mac68k console\n");
|
|
}
|
|
|
|
|
|
/*
|
|
* Polled input char.
|
|
*/
|
|
static int
|
|
zs_getc(zc)
|
|
register volatile struct zschan *zc;
|
|
{
|
|
register int s, c, rr0;
|
|
|
|
s = splhigh();
|
|
/* Wait for a character to arrive. */
|
|
do {
|
|
rr0 = zc->zc_csr;
|
|
ZS_DELAY();
|
|
} while ((rr0 & ZSRR0_RX_READY) == 0);
|
|
|
|
c = zc->zc_data;
|
|
ZS_DELAY();
|
|
splx(s);
|
|
|
|
/*
|
|
* This is used by the kd driver to read scan codes,
|
|
* so don't translate '\r' ==> '\n' here...
|
|
*/
|
|
return (c);
|
|
}
|
|
|
|
/*
|
|
* Polled output char.
|
|
*/
|
|
static void
|
|
zs_putc(zc, c)
|
|
register volatile struct zschan *zc;
|
|
int c;
|
|
{
|
|
register int s, rr0;
|
|
register long wait = 0;
|
|
|
|
s = splhigh();
|
|
/* Wait for transmitter to become ready. */
|
|
do {
|
|
rr0 = zc->zc_csr;
|
|
ZS_DELAY();
|
|
} while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
|
|
|
|
if ((rr0 & ZSRR0_TX_READY) != 0) {
|
|
zc->zc_data = c;
|
|
ZS_DELAY();
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
|
|
/*
|
|
* Polled console input putchar.
|
|
*/
|
|
int
|
|
zscngetc(dev)
|
|
dev_t dev;
|
|
{
|
|
register volatile struct zschan *zc = zs_conschan;
|
|
register int c;
|
|
|
|
c = zs_getc(zc);
|
|
return (c);
|
|
}
|
|
|
|
/*
|
|
* Polled console output putchar.
|
|
*/
|
|
void
|
|
zscnputc(dev, c)
|
|
dev_t dev;
|
|
int c;
|
|
{
|
|
register volatile struct zschan *zc = zs_conschan;
|
|
|
|
zs_putc(zc, c);
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Handle user request to enter kernel debugger.
|
|
*/
|
|
void
|
|
zs_abort(zst)
|
|
register struct zstty_softc *zst;
|
|
{
|
|
register volatile struct zschan *zc = zs_conschan;
|
|
int rr0;
|
|
register long wait = 0;
|
|
|
|
if ((zst->zst_hwflags & ZS_HWFLAG_CONABRT) == 0)
|
|
return;
|
|
|
|
/* Wait for end of break to avoid PROM abort. */
|
|
/* XXX - Limit the wait? */
|
|
do {
|
|
rr0 = zc->zc_csr;
|
|
ZS_DELAY();
|
|
} while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY));
|
|
|
|
if (wait > ZSABORT_DELAY) {
|
|
if (zst != NULL) zst->zst_hwflags &= ~ZS_HWFLAG_CONABRT;
|
|
/* If we time out, turn off the abort ability! */
|
|
}
|
|
|
|
#ifdef DDB
|
|
Debugger();
|
|
#endif
|
|
}
|