404 lines
11 KiB
C
404 lines
11 KiB
C
/* $NetBSD: if_ex_cardbus.c,v 1.55 2011/08/01 11:20:27 drochner Exp $ */
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/*
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* Copyright (c) 1998 and 1999
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* HAYAKAWA Koichi. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY HAYAKAWA KOICHI ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL TAKESHI OHASHI OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* CardBus specific routines for 3Com 3C575-family CardBus ethernet adapter
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_ex_cardbus.c,v 1.55 2011/08/01 11:20:27 drochner Exp $");
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/* #define EX_DEBUG 4 */ /* define to report information for debugging */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#include <sys/syslog.h>
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#include <sys/select.h>
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#include <sys/device.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_ether.h>
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#include <net/if_media.h>
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#include <sys/cpu.h>
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#include <sys/bus.h>
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#include <dev/cardbus/cardbusvar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/mii/miivar.h>
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#include <dev/ic/elink3var.h>
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#include <dev/ic/elink3reg.h>
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#include <dev/ic/elinkxlreg.h>
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#include <dev/ic/elinkxlvar.h>
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#if defined DEBUG && !defined EX_DEBUG
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#define EX_DEBUG
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#endif
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#if defined EX_DEBUG
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#define DPRINTF(a) printf a
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#else
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#define DPRINTF(a)
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#endif
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#define CARDBUS_3C575BTX_FUNCSTAT_PCIREG PCI_BAR2 /* means 0x18 */
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#define EX_CB_INTR 4 /* intr acknowledge reg. CardBus only */
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#define EX_CB_INTR_ACK 0x8000 /* intr acknowledge bit */
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int ex_cardbus_match(device_t, cfdata_t, void *);
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void ex_cardbus_attach(device_t, device_t, void *);
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int ex_cardbus_detach(device_t, int);
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void ex_cardbus_intr_ack(struct ex_softc *);
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int ex_cardbus_enable(struct ex_softc *);
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void ex_cardbus_disable(struct ex_softc *);
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struct ex_cardbus_softc {
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struct ex_softc sc_softc;
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cardbus_devfunc_t sc_ct;
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uint8_t sc_cardbus_flags;
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#define EX_REATTACH 0x01
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#define EX_ABSENT 0x02
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uint8_t sc_cardtype;
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#define EX_CB_BOOMERANG 1
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#define EX_CB_CYCLONE 2
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/* CardBus function status space. 575B requests it. */
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bus_space_tag_t sc_funct;
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bus_space_handle_t sc_funch;
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bus_size_t sc_funcsize;
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bus_size_t sc_mapsize; /* the size of mapped bus space region */
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pcitag_t sc_tag;
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pcireg_t sc_csr;
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int sc_bar_reg; /* which BAR to use */
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pcireg_t sc_bar_val; /* value of the BAR */
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int sc_bar_reg1; /* which BAR to use */
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pcireg_t sc_bar_val1; /* value of the BAR */
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};
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CFATTACH_DECL3_NEW(ex_cardbus, sizeof(struct ex_cardbus_softc),
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ex_cardbus_match, ex_cardbus_attach, ex_cardbus_detach, ex_activate,
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NULL, NULL, DVF_DETACH_SHUTDOWN);
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const struct ex_cardbus_product {
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uint32_t ecp_prodid; /* CardBus product ID */
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int ecp_flags; /* initial softc flags */
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pcireg_t ecp_csr; /* PCI CSR flags */
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int ecp_cardtype; /* card type */
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const char *ecp_name; /* device name */
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} ex_cardbus_products[] = {
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{ PCI_PRODUCT_3COM_3C575TX,
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EX_CONF_MII | EX_CONF_EEPROM_OFF | EX_CONF_EEPROM_8BIT,
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PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE,
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EX_CB_BOOMERANG,
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"3c575-TX Ethernet" },
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{ PCI_PRODUCT_3COM_3C575BTX,
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EX_CONF_90XB|EX_CONF_MII|EX_CONF_INV_LED_POLARITY |
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EX_CONF_EEPROM_OFF | EX_CONF_EEPROM_8BIT,
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PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
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PCI_COMMAND_MASTER_ENABLE,
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EX_CB_CYCLONE,
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"3c575B-TX Ethernet" },
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{ PCI_PRODUCT_3COM_3C575CTX,
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EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF |
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EX_CONF_EEPROM_8BIT,
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PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
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PCI_COMMAND_MASTER_ENABLE,
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EX_CB_CYCLONE,
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"3c575CT Ethernet" },
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{ PCI_PRODUCT_3COM_3C656_E,
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EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF |
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EX_CONF_EEPROM_8BIT | EX_CONF_INV_LED_POLARITY,
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PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
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PCI_COMMAND_MASTER_ENABLE,
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EX_CB_CYCLONE,
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"3c656-TX Ethernet" },
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{ PCI_PRODUCT_3COM_3C656B_E,
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EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF |
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EX_CONF_EEPROM_8BIT | EX_CONF_INV_LED_POLARITY,
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PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
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PCI_COMMAND_MASTER_ENABLE,
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EX_CB_CYCLONE,
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"3c656B-TX Ethernet" },
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{ PCI_PRODUCT_3COM_3C656C_E,
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EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF |
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EX_CONF_EEPROM_8BIT,
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PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
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PCI_COMMAND_MASTER_ENABLE,
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EX_CB_CYCLONE,
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"3c656C-TX Ethernet" },
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{ 0,
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0,
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0,
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0,
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NULL },
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};
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void ex_cardbus_setup(struct ex_cardbus_softc *);
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const struct ex_cardbus_product *ex_cardbus_lookup
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(const struct cardbus_attach_args *);
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const struct ex_cardbus_product *
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ex_cardbus_lookup(const struct cardbus_attach_args *ca)
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{
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const struct ex_cardbus_product *ecp;
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if (PCI_VENDOR(ca->ca_id) != PCI_VENDOR_3COM)
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return (NULL);
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for (ecp = ex_cardbus_products; ecp->ecp_name != NULL; ecp++)
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if (PCI_PRODUCT(ca->ca_id) == ecp->ecp_prodid)
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return (ecp);
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return (NULL);
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}
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int
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ex_cardbus_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct cardbus_attach_args *ca = aux;
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if (ex_cardbus_lookup(ca) != NULL)
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return (1);
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return (0);
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}
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void
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ex_cardbus_attach(device_t parent, device_t self, void *aux)
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{
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struct ex_cardbus_softc *csc = device_private(self);
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struct ex_softc *sc = &csc->sc_softc;
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struct cardbus_attach_args *ca = aux;
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cardbus_devfunc_t ct = ca->ca_ct;
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const struct ex_cardbus_product *ecp;
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bus_addr_t adr, adr1;
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sc->sc_dev = self;
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sc->sc_dmat = ca->ca_dmat;
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csc->sc_ct = ca->ca_ct;
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csc->sc_tag = ca->ca_tag;
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ecp = ex_cardbus_lookup(ca);
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if (ecp == NULL) {
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printf("\n");
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panic("ex_cardbus_attach: impossible");
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}
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aprint_normal(": 3Com %s\n", ecp->ecp_name);
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sc->ex_conf = ecp->ecp_flags;
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csc->sc_cardtype = ecp->ecp_cardtype;
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csc->sc_csr = ecp->ecp_csr;
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if (Cardbus_mapreg_map(ct, PCI_BAR0, PCI_MAPREG_TYPE_IO, 0,
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&sc->sc_iot, &sc->sc_ioh, &adr, &csc->sc_mapsize) == 0) {
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csc->sc_bar_reg = PCI_BAR0;
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csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
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if (csc->sc_cardtype == EX_CB_CYCLONE) {
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/* Map CardBus function status window. */
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if (Cardbus_mapreg_map(ct,
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CARDBUS_3C575BTX_FUNCSTAT_PCIREG,
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PCI_MAPREG_TYPE_MEM, 0,
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&csc->sc_funct, &csc->sc_funch,
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&adr1, &csc->sc_funcsize) == 0) {
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csc->sc_bar_reg1 =
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CARDBUS_3C575BTX_FUNCSTAT_PCIREG;
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csc->sc_bar_val1 =
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adr1 | PCI_MAPREG_TYPE_MEM;
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} else {
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aprint_error_dev(self, "unable to map function "
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"status window\n");
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return;
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}
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/* Setup interrupt acknowledge hook */
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sc->intr_ack = ex_cardbus_intr_ack;
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}
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}
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else {
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aprint_naive(": can't map i/o space\n");
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return;
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}
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/* Power management hooks. */
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sc->enable = ex_cardbus_enable;
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sc->disable = ex_cardbus_disable;
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/*
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* Handle power management nonsense and
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* initialize the configuration registers.
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*/
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ex_cardbus_setup(csc);
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ex_config(sc);
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if (csc->sc_cardtype == EX_CB_CYCLONE)
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bus_space_write_4(csc->sc_funct, csc->sc_funch,
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EX_CB_INTR, EX_CB_INTR_ACK);
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Cardbus_function_disable(csc->sc_ct);
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}
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void
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ex_cardbus_intr_ack(struct ex_softc *sc)
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{
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struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc;
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bus_space_write_4(csc->sc_funct, csc->sc_funch, EX_CB_INTR,
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EX_CB_INTR_ACK);
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}
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int
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ex_cardbus_detach(device_t self, int flags)
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{
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struct ex_cardbus_softc *csc = device_private(self);
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struct ex_softc *sc = &csc->sc_softc;
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struct cardbus_devfunc *ct = csc->sc_ct;
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int rv;
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#if defined(DIAGNOSTIC)
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if (ct == NULL) {
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panic("%s: data structure lacks", device_xname(self));
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}
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#endif
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if ((rv = ex_detach(sc)) != 0)
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return rv;
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/*
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* Unhook the interrupt handler.
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*/
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Cardbus_intr_disestablish(ct, sc->sc_ih);
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if (csc->sc_cardtype == EX_CB_CYCLONE) {
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Cardbus_mapreg_unmap(ct,
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CARDBUS_3C575BTX_FUNCSTAT_PCIREG,
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csc->sc_funct, csc->sc_funch, csc->sc_funcsize);
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}
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Cardbus_mapreg_unmap(ct, PCI_BAR0, sc->sc_iot,
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sc->sc_ioh, csc->sc_mapsize);
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return 0;
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}
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int
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ex_cardbus_enable(struct ex_softc *sc)
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{
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struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc;
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Cardbus_function_enable(csc->sc_ct);
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ex_cardbus_setup(csc);
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sc->sc_ih = Cardbus_intr_establish(csc->sc_ct, IPL_NET, ex_intr, sc);
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if (NULL == sc->sc_ih) {
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aprint_error_dev(sc->sc_dev, "couldn't establish interrupt\n");
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return (1);
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}
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return (0);
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}
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void
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ex_cardbus_disable(struct ex_softc *sc)
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{
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struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc;
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if (sc->sc_ih != NULL) {
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Cardbus_intr_disestablish(csc->sc_ct, sc->sc_ih);
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sc->sc_ih = NULL;
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}
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Cardbus_function_disable(csc->sc_ct);
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}
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void
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ex_cardbus_setup(struct ex_cardbus_softc *csc)
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{
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cardbus_devfunc_t ct = csc->sc_ct;
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pcireg_t reg;
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(void)cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0);
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/* Program the BAR */
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Cardbus_conf_write(ct, csc->sc_tag, csc->sc_bar_reg, csc->sc_bar_val);
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/* Make sure the right access type is on the CardBus bridge. */
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if (csc->sc_cardtype == EX_CB_CYCLONE) {
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/* Program the BAR */
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Cardbus_conf_write(ct, csc->sc_tag,
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csc->sc_bar_reg1, csc->sc_bar_val1);
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/*
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* Make sure CardBus brigde can access memory space. Usually
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* memory access is enabled by BIOS, but some BIOSes do not
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* enable it.
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*/
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}
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/* Enable the appropriate bits in the CARDBUS CSR. */
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reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG);
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reg |= csc->sc_csr;
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Cardbus_conf_write(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
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/*
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* set latency timer
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*/
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reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_BHLC_REG);
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if (PCI_LATTIMER(reg) < 0x20) {
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/* at least the value of latency timer should 0x20. */
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DPRINTF(("if_ex_cardbus: lattimer 0x%x -> 0x20\n",
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PCI_LATTIMER(reg)));
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reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
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reg |= (0x20 << PCI_LATTIMER_SHIFT);
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Cardbus_conf_write(ct, csc->sc_tag, PCI_BHLC_REG, reg);
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}
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}
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