178 lines
5.5 KiB
C
178 lines
5.5 KiB
C
/* $NetBSD: mcontext.h,v 1.17 2014/08/12 20:27:10 joerg Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Klaus Klein.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _POWERPC_MCONTEXT_H_
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#define _POWERPC_MCONTEXT_H_
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/*
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* Layout of mcontext_t based on the System V Application Binary Interface,
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* Edition 4.1, PowerPC Processor ABI Supplement - September 1995, and
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* extended for the AltiVec Register File. Note that due to the increased
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* alignment requirements of the latter, the offset of mcontext_t within
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* an ucontext_t is different from System V.
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*/
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#define _NGREG 39 /* GR0-31, CR, LR, SRR0, SRR1, CTR, XER, MQ */
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typedef long __greg_t;
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typedef __greg_t __gregset_t[_NGREG];
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#define _REG_R0 0
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#define _REG_R1 1
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#define _REG_R2 2
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#define _REG_R3 3
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#define _REG_R4 4
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#define _REG_R5 5
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#define _REG_R6 6
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#define _REG_R7 7
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#define _REG_R8 8
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#define _REG_R9 9
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#define _REG_R10 10
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#define _REG_R11 11
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#define _REG_R12 12
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#define _REG_R13 13
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#define _REG_R14 14
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#define _REG_R15 15
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#define _REG_R16 16
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#define _REG_R17 17
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#define _REG_R18 18
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#define _REG_R19 19
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#define _REG_R20 20
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#define _REG_R21 21
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#define _REG_R22 22
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#define _REG_R23 23
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#define _REG_R24 24
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#define _REG_R25 25
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#define _REG_R26 26
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#define _REG_R27 27
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#define _REG_R28 28
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#define _REG_R29 29
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#define _REG_R30 30
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#define _REG_R31 31
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#define _REG_CR 32 /* Condition Register */
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#define _REG_LR 33 /* Link Register */
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#define _REG_PC 34 /* PC (copy of SRR0) */
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#define _REG_MSR 35 /* MSR (copy of SRR1) */
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#define _REG_CTR 36 /* Count Register */
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#define _REG_XER 37 /* Integer Exception Register */
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#define _REG_MQ 38 /* MQ Register (POWER only) */
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typedef struct {
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#ifdef _KERNEL
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unsigned long long __fpu_regs[32]; /* FP0-31 */
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#else
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double __fpu_regs[32]; /* FP0-31 */
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#endif
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unsigned int __fpu_fpscr; /* FP Status and Control Register */
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unsigned int __fpu_valid; /* Set together with _UC_FPU */
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} __fpregset_t;
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#define _NVR 32 /* Number of Vector registers */
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typedef struct {
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union __vr {
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unsigned char __vr8[16];
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unsigned short __vr16[8];
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unsigned int __vr32[4];
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unsigned char __spe8[8];
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unsigned short __spe16[4];
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unsigned int __spe32[2];
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} __vrs[_NVR] __aligned(16);
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unsigned int __vscr; /* VSCR */
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unsigned int __vrsave; /* VRSAVE */
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} __vrf_t;
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typedef struct {
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__gregset_t __gregs; /* General Purpose Register set */
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__fpregset_t __fpregs; /* Floating Point Register set */
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__vrf_t __vrf; /* Vector Register File */
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} mcontext_t;
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#if defined(_LP64)
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typedef int __greg32_t;
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typedef __greg32_t __gregset32_t[_NGREG];
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typedef struct {
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__gregset32_t __gregs; /* General Purpose Register set */
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__fpregset_t __fpregs; /* Floating Point Register set */
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__vrf_t __vrf; /* Vector Register File */
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} mcontext32_t;
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#endif
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/* Machine-dependent uc_flags */
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#define _UC_POWERPC_VEC 0x00010000 /* Vector Register File valid */
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#define _UC_POWERPC_SPE 0x00020000 /* Vector Register File valid */
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#define _UC_TLSBASE 0x00080000 /* thread context valid in R2 */
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#define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_R1])
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#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
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#define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_R3])
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#define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc)
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#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || defined(__LIBPTHREAD_SOURCE__)
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#include <sys/tls.h>
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/*
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* On PowerPC, since displacements are signed 16-bit values, the TCB Pointer
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* is biased by 0x7000 + sizeof(tcb) so that first thread datum can be
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* addressed by -28672 thereby leaving 60KB available for use as thread data.
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*/
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#define TLS_TP_OFFSET 0x7000
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#define TLS_DTV_OFFSET 0x8000
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__CTASSERT(TLS_TP_OFFSET + sizeof(struct tls_tcb) < 0x8000);
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static __inline void *
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__lwp_gettcb_fast(void)
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{
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void *__tcb;
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__asm __volatile(
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"addi %[__tcb],%%r2,%[__offset]"
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: [__tcb] "=r" (__tcb)
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: [__offset] "n" (-(TLS_TP_OFFSET + sizeof(struct tls_tcb))));
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return __tcb;
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}
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static __inline void
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__lwp_settcb(void *__tcb)
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{
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__asm __volatile(
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"addi %%r2,%[__tcb],%[__offset]"
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:
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: [__tcb] "r" (__tcb),
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[__offset] "n" (TLS_TP_OFFSET + sizeof(struct tls_tcb)));
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}
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#endif /* _RTLD_SOURCE || _LIBC_SOURCE || __LIBPTHREAD_SOURCE__ */
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#endif /* !_POWERPC_MCONTEXT_H_ */
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