689 lines
18 KiB
C
689 lines
18 KiB
C
/* $NetBSD: booke_machdep.c,v 1.23 2015/01/23 07:27:05 nonaka Exp $ */
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/*-
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* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
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* Agency and which was developed by Matt Thomas of 3am Software Foundry.
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*
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* This material is based upon work supported by the Defense Advanced Research
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* Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
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* Contract No. N66001-09-C-2073.
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* Approved for Public Release, Distribution Unlimited
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#define __INTR_PRIVATE
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#define _POWERPC_BUS_DMA_PRIVATE
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: booke_machdep.c,v 1.23 2015/01/23 07:27:05 nonaka Exp $");
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#include "opt_modular.h"
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#include <sys/param.h>
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#include <sys/cpu.h>
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#include <sys/device.h>
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#include <sys/intr.h>
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#include <sys/mount.h>
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#include <sys/msgbuf.h>
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#include <sys/kernel.h>
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#include <sys/reboot.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <uvm/uvm_extern.h>
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#include <powerpc/pcb.h>
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#include <powerpc/spr.h>
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#include <powerpc/booke/spr.h>
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#include <powerpc/booke/cpuvar.h>
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/*
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* Global variables used here and there
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*/
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paddr_t msgbuf_paddr;
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psize_t pmemsize;
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struct vm_map *phys_map;
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#ifdef MODULAR
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register_t cpu_psluserset = PSL_USERSET;
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register_t cpu_pslusermod = PSL_USERMOD;
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register_t cpu_pslusermask = PSL_USERMASK;
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#endif
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static bus_addr_t booke_dma_phys_to_bus_mem(bus_dma_tag_t, bus_addr_t);
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static bus_addr_t booke_dma_bus_mem_to_phys(bus_dma_tag_t, bus_addr_t);
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struct powerpc_bus_dma_tag booke_bus_dma_tag = {
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._dmamap_create = _bus_dmamap_create,
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._dmamap_destroy = _bus_dmamap_destroy,
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._dmamap_load = _bus_dmamap_load,
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._dmamap_load_mbuf = _bus_dmamap_load_mbuf,
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._dmamap_load_uio = _bus_dmamap_load_uio,
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._dmamap_load_raw = _bus_dmamap_load_raw,
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._dmamap_unload = _bus_dmamap_unload,
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/*
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* The caches on BookE are coherent so we don't need to do any special
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* cache synchronization.
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*/
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//._dmamap_sync = _bus_dmamap_sync,
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._dmamem_alloc = _bus_dmamem_alloc,
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._dmamem_free = _bus_dmamem_free,
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._dmamem_map = _bus_dmamem_map,
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._dmamem_unmap = _bus_dmamem_unmap,
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._dmamem_mmap = _bus_dmamem_mmap,
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._dma_phys_to_bus_mem = booke_dma_phys_to_bus_mem,
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._dma_bus_mem_to_phys = booke_dma_bus_mem_to_phys,
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};
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static bus_addr_t
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booke_dma_phys_to_bus_mem(bus_dma_tag_t t, bus_addr_t a)
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{
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return a;
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}
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static bus_addr_t
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booke_dma_bus_mem_to_phys(bus_dma_tag_t t, bus_addr_t a)
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{
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return a;
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}
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struct cpu_md_ops cpu_md_ops;
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struct cpu_softc cpu_softc[] = {
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[0] = {
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.cpu_ci = &cpu_info[0],
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},
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#ifdef MULTIPROCESSOR
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[CPU_MAXNUM-1] = {
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.cpu_ci = &cpu_info[CPU_MAXNUM-1],
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},
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#endif
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};
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struct cpu_info cpu_info[] = {
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[0] = {
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.ci_curlwp = &lwp0,
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.ci_tlb_info = &pmap_tlb0_info,
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.ci_softc = &cpu_softc[0],
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.ci_cpl = IPL_HIGH,
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.ci_idepth = -1,
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},
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#ifdef MULTIPROCESSOR
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[CPU_MAXNUM-1] = {
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.ci_curlwp = NULL,
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.ci_tlb_info = &pmap_tlb0_info,
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.ci_softc = &cpu_softc[CPU_MAXNUM-1],
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.ci_cpl = IPL_HIGH,
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.ci_idepth = -1,
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},
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#endif
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};
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__CTASSERT(__arraycount(cpu_info) == __arraycount(cpu_softc));
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/*
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* This should probably be in autoconf! XXX
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*/
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char machine[] = MACHINE; /* from <machine/param.h> */
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char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */
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char bootpath[256];
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#if NKSYMS || defined(DDB) || defined(MODULAR)
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void *startsym, *endsym;
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#endif
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#if defined(MULTIPROCESSOR)
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volatile struct cpu_hatch_data cpu_hatch_data __cacheline_aligned;
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#endif
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int fake_mapiodev = 1;
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void
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booke_cpu_startup(const char *model)
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{
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vaddr_t minaddr, maxaddr;
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char pbuf[9];
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cpu_setmodel("%s", model);
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printf("%s%s", copyright, version);
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format_bytes(pbuf, sizeof(pbuf), ctob((uint64_t)physmem));
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printf("total memory = %s\n", pbuf);
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minaddr = 0;
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/*
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* Allocate a submap for physio
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*/
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phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
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VM_PHYS_SIZE, 0, false, NULL);
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/*
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* No need to allocate an mbuf cluster submap. Mbuf clusters
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* are allocated via the pool allocator, and we use direct-mapped
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* pool pages.
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*/
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format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
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printf("avail memory = %s\n", pbuf);
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/*
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* Register the tlb's evcnts
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*/
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pmap_tlb_info_evcnt_attach(curcpu()->ci_tlb_info);
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/*
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* Set up the board properties database.
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*/
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board_info_init();
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/*
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* Now that we have VM, malloc()s are OK in bus_space.
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*/
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bus_space_mallocok();
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fake_mapiodev = 0;
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#ifdef MULTIPROCESSOR
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pmap_kernel()->pm_active = kcpuset_running;
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pmap_kernel()->pm_onproc = kcpuset_running;
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for (size_t i = 1; i < __arraycount(cpu_info); i++) {
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struct cpu_info * const ci = &cpu_info[i];
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struct cpu_softc * const cpu = &cpu_softc[i];
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cpu->cpu_ci = ci;
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cpu->cpu_bst = cpu_softc[0].cpu_bst;
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cpu->cpu_le_bst = cpu_softc[0].cpu_le_bst;
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cpu->cpu_bsh = cpu_softc[0].cpu_bsh;
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cpu->cpu_highmem = cpu_softc[0].cpu_highmem;
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ci->ci_softc = cpu;
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ci->ci_tlb_info = &pmap_tlb0_info;
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ci->ci_cpl = IPL_HIGH;
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ci->ci_idepth = -1;
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ci->ci_pmap_kern_segtab = curcpu()->ci_pmap_kern_segtab;
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}
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kcpuset_create(&cpuset_info.cpus_running, true);
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kcpuset_create(&cpuset_info.cpus_hatched, true);
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kcpuset_create(&cpuset_info.cpus_paused, true);
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kcpuset_create(&cpuset_info.cpus_resumed, true);
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kcpuset_create(&cpuset_info.cpus_halted, true);
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kcpuset_set(cpuset_info.cpus_running, cpu_number());
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#endif /* MULTIPROCESSOR */
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}
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static void
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dumpsys(void)
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{
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printf("dumpsys: TBD\n");
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}
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/*
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* Halt or reboot the machine after syncing/dumping according to howto.
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*/
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void
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cpu_reboot(int howto, char *what)
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{
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static int syncing;
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static char str[256];
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char *ap = str, *ap1 = ap;
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boothowto = howto;
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if (!cold && !(howto & RB_NOSYNC) && !syncing) {
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syncing = 1;
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vfs_shutdown(); /* sync */
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resettodr(); /* set wall clock */
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}
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splhigh();
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if (!cold && (howto & RB_DUMP))
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dumpsys();
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doshutdownhooks();
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pmf_system_shutdown(boothowto);
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if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
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/* Power off here if we know how...*/
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}
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if (howto & RB_HALT) {
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printf("halted\n\n");
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goto reboot; /* XXX for now... */
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#ifdef DDB
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printf("dropping to debugger\n");
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while(1)
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Debugger();
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#endif
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}
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printf("rebooting\n\n");
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if (what && *what) {
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if (strlen(what) > sizeof str - 5)
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printf("boot string too large, ignored\n");
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else {
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strcpy(str, what);
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ap1 = ap = str + strlen(str);
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*ap++ = ' ';
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}
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}
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*ap++ = '-';
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if (howto & RB_SINGLE)
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*ap++ = 's';
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if (howto & RB_KDB)
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*ap++ = 'd';
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*ap++ = 0;
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if (ap[-2] == '-')
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*ap1 = 0;
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/* flush cache for msgbuf */
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dcache_wb(msgbuf_paddr, round_page(MSGBUFSIZE));
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reboot:
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__asm volatile("msync; isync");
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(*cpu_md_ops.md_cpu_reset)();
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printf("%s: md_cpu_reset() failed!\n", __func__);
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#ifdef DDB
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for (;;)
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Debugger();
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#else
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for (;;)
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/* nothing */;
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#endif
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}
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/*
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* mapiodev:
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*
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* Allocate vm space and mapin the I/O address. Use reserved TLB
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* mapping if one is found.
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*/
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void *
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mapiodev(paddr_t pa, psize_t len, bool prefetchable)
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{
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const vsize_t off = pa & PAGE_MASK;
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/*
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* See if we have reserved TLB entry for the pa. This needs to be
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* true for console as we can't use uvm during early bootstrap.
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*/
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void * const p = tlb_mapiodev(pa, len, prefetchable);
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if (p != NULL)
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return p;
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if (fake_mapiodev)
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panic("mapiodev: no TLB entry reserved for %llx+%llx",
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(long long)pa, (long long)len);
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const paddr_t orig_pa = pa;
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const psize_t orig_len = len;
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vsize_t align = 0;
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pa = trunc_page(pa);
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len = round_page(off + len);
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/*
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* If we are allocating a large amount (>= 1MB) try to get an
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* aligned VA region for it so try to do a large mapping for it.
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*/
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if ((len & (len - 1)) == 0 && len >= 0x100000)
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align = len;
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vaddr_t va = uvm_km_alloc(kernel_map, len, align, UVM_KMF_VAONLY);
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if (va == 0 && align > 0) {
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/*
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* Large aligned request failed. Let's just get anything.
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*/
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align = 0;
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va = uvm_km_alloc(kernel_map, len, align, UVM_KMF_VAONLY);
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}
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if (va == 0)
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return NULL;
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if (align) {
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/*
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* Now try to map that via one big TLB entry.
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*/
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pt_entry_t pte = pte_make_kenter_pa(pa, NULL,
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VM_PROT_READ|VM_PROT_WRITE,
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prefetchable ? 0 : PMAP_NOCACHE);
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if (!tlb_ioreserve(va, len, pte)) {
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void * const p0 = tlb_mapiodev(orig_pa, orig_len,
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prefetchable);
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KASSERT(p0 != NULL);
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return p0;
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}
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}
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for (va += len, pa += len; len > 0; len -= PAGE_SIZE) {
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va -= PAGE_SIZE;
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pa -= PAGE_SIZE;
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pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE,
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prefetchable ? 0 : PMAP_NOCACHE);
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}
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pmap_update(pmap_kernel());
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return (void *)(va + off);
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}
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void
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unmapiodev(vaddr_t va, vsize_t len)
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{
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/* Nothing to do for reserved (ie. not uvm_km_alloc'd) mappings. */
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if (va < VM_MIN_KERNEL_ADDRESS || va > VM_MAX_KERNEL_ADDRESS) {
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tlb_unmapiodev(va, len);
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return;
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}
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len = round_page((va & PAGE_MASK) + len);
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va = trunc_page(va);
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pmap_kremove(va, len);
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uvm_km_free(kernel_map, va, len, UVM_KMF_VAONLY);
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}
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void
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cpu_evcnt_attach(struct cpu_info *ci)
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{
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struct cpu_softc * const cpu = ci->ci_softc;
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const char * const xname = ci->ci_data.cpu_name;
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evcnt_attach_dynamic_nozero(&ci->ci_ev_clock, EVCNT_TYPE_INTR,
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NULL, xname, "clock");
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evcnt_attach_dynamic_nozero(&cpu->cpu_ev_late_clock, EVCNT_TYPE_INTR,
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NULL, xname, "late clock");
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evcnt_attach_dynamic_nozero(&cpu->cpu_ev_exec_trap_sync, EVCNT_TYPE_TRAP,
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NULL, xname, "exec pages synced (trap)");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_traps, EVCNT_TYPE_TRAP,
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NULL, xname, "traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_kdsi, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "kernel DSI traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "user DSI traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi_fatal, EVCNT_TYPE_TRAP,
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&ci->ci_ev_udsi, xname, "user DSI failures");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_kisi, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "kernel ISI traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_isi, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "user ISI traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_isi_fatal, EVCNT_TYPE_TRAP,
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&ci->ci_ev_isi, xname, "user ISI failures");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_scalls, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "system call traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_pgm, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "PGM traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_debug, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "debug traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_fpu, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "FPU unavailable traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_fpusw, EVCNT_TYPE_MISC,
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&ci->ci_ev_fpu, xname, "FPU context switches");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_ali, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "user alignment traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_ali_fatal, EVCNT_TYPE_TRAP,
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&ci->ci_ev_ali, xname, "user alignment traps");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_umchk, EVCNT_TYPE_TRAP,
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&ci->ci_ev_umchk, xname, "user MCHK failures");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_vec, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "SPE unavailable");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_vecsw, EVCNT_TYPE_MISC,
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&ci->ci_ev_vec, xname, "SPE context switches");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_ipi, EVCNT_TYPE_INTR,
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NULL, xname, "IPIs");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_tlbmiss_soft, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "soft tlb misses");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_dtlbmiss_hard, EVCNT_TYPE_TRAP,
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&ci->ci_ev_traps, xname, "data tlb misses");
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evcnt_attach_dynamic_nozero(&ci->ci_ev_itlbmiss_hard, EVCNT_TYPE_TRAP,
|
|
&ci->ci_ev_traps, xname, "inst tlb misses");
|
|
}
|
|
|
|
#ifdef MULTIPROCESSOR
|
|
register_t
|
|
cpu_hatch(void)
|
|
{
|
|
struct cpuset_info * const csi = &cpuset_info;
|
|
const size_t id = cpu_number();
|
|
|
|
/*
|
|
* We've hatched so tell the spinup code.
|
|
*/
|
|
kcpuset_set(csi->cpus_hatched, id);
|
|
|
|
/*
|
|
* Loop until running bit for this cpu is set.
|
|
*/
|
|
while (!kcpuset_isset(csi->cpus_running, id)) {
|
|
continue;
|
|
}
|
|
|
|
/*
|
|
* Now that we are active, start the clocks.
|
|
*/
|
|
cpu_initclocks();
|
|
|
|
/*
|
|
* Return sp of the idlelwp. Which we should be already using but ...
|
|
*/
|
|
return curcpu()->ci_curpcb->pcb_sp;
|
|
}
|
|
|
|
void
|
|
cpu_boot_secondary_processors(void)
|
|
{
|
|
volatile struct cpuset_info * const csi = &cpuset_info;
|
|
CPU_INFO_ITERATOR cii;
|
|
struct cpu_info *ci;
|
|
kcpuset_t *running;
|
|
|
|
kcpuset_create(&running, true);
|
|
|
|
for (CPU_INFO_FOREACH(cii, ci)) {
|
|
/*
|
|
* Skip this CPU if it didn't sucessfully hatch.
|
|
*/
|
|
if (!kcpuset_isset(csi->cpus_hatched, cpu_index(ci)))
|
|
continue;
|
|
|
|
KASSERT(!CPU_IS_PRIMARY(ci));
|
|
KASSERT(ci->ci_data.cpu_idlelwp);
|
|
|
|
kcpuset_set(running, cpu_index(ci));
|
|
}
|
|
KASSERT(kcpuset_match(csi->cpus_hatched, running));
|
|
if (!kcpuset_iszero(running)) {
|
|
kcpuset_merge(csi->cpus_running, running);
|
|
}
|
|
kcpuset_destroy(running);
|
|
}
|
|
#endif
|
|
|
|
uint32_t
|
|
cpu_read_4(bus_addr_t a)
|
|
{
|
|
struct cpu_softc * const cpu = curcpu()->ci_softc;
|
|
// printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a);
|
|
return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, a);
|
|
}
|
|
|
|
uint8_t
|
|
cpu_read_1(bus_addr_t a)
|
|
{
|
|
struct cpu_softc * const cpu = curcpu()->ci_softc;
|
|
// printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a);
|
|
return bus_space_read_1(cpu->cpu_bst, cpu->cpu_bsh, a);
|
|
}
|
|
|
|
void
|
|
cpu_write_4(bus_addr_t a, uint32_t v)
|
|
{
|
|
struct cpu_softc * const cpu = curcpu()->ci_softc;
|
|
bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, a, v);
|
|
}
|
|
|
|
void
|
|
cpu_write_1(bus_addr_t a, uint8_t v)
|
|
{
|
|
struct cpu_softc * const cpu = curcpu()->ci_softc;
|
|
bus_space_write_1(cpu->cpu_bst, cpu->cpu_bsh, a, v);
|
|
}
|
|
|
|
void
|
|
booke_sstep(struct trapframe *tf)
|
|
{
|
|
KASSERT(tf->tf_srr1 & PSL_DE);
|
|
const uint32_t insn = ufetch_32((const void *)tf->tf_srr0);
|
|
register_t dbcr0 = DBCR0_IAC1 | DBCR0_IDM;
|
|
register_t dbcr1 = DBCR1_IAC1US_USER | DBCR1_IAC1ER_DS1;
|
|
if ((insn >> 28) == 4) {
|
|
uint32_t iac2 = 0;
|
|
if ((insn >> 26) == 0x12) {
|
|
const int32_t off = (((int32_t)insn << 6) >> 6) & ~3;
|
|
iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off;
|
|
dbcr0 |= DBCR0_IAC2;
|
|
} else if ((insn >> 26) == 0x10) {
|
|
const int16_t off = insn & ~3;
|
|
iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off;
|
|
dbcr0 |= DBCR0_IAC2;
|
|
} else if ((insn & 0xfc00fffe) == 0x4c000420) {
|
|
iac2 = tf->tf_ctr;
|
|
dbcr0 |= DBCR0_IAC2;
|
|
} else if ((insn & 0xfc00fffe) == 0x4c000020) {
|
|
iac2 = tf->tf_lr;
|
|
dbcr0 |= DBCR0_IAC2;
|
|
}
|
|
if (dbcr0 & DBCR0_IAC2) {
|
|
dbcr1 |= DBCR1_IAC2US_USER | DBCR1_IAC2ER_DS1;
|
|
mtspr(SPR_IAC2, iac2);
|
|
}
|
|
}
|
|
mtspr(SPR_IAC1, tf->tf_srr0 + 4);
|
|
mtspr(SPR_DBCR1, dbcr1);
|
|
mtspr(SPR_DBCR0, dbcr0);
|
|
}
|
|
|
|
#ifdef DIAGNOSTIC
|
|
static inline void
|
|
swap_data(uint64_t *data, size_t a, size_t b)
|
|
{
|
|
uint64_t swap = data[a];
|
|
data[a] = data[b];
|
|
data[b] = swap;
|
|
}
|
|
|
|
static void
|
|
sort_data(uint64_t *data, size_t count)
|
|
{
|
|
#if 0
|
|
/*
|
|
* Mostly classic bubble sort
|
|
*/
|
|
do {
|
|
size_t new_count = 0;
|
|
for (size_t i = 1; i < count; i++) {
|
|
if (tbs[i - 1] > tbs[i]) {
|
|
swap_tbs(tbs, i - 1, i);
|
|
new_count = i;
|
|
}
|
|
}
|
|
count = new_count;
|
|
} while (count > 0);
|
|
#else
|
|
/*
|
|
* Comb sort
|
|
*/
|
|
size_t gap = count;
|
|
bool swapped = false;
|
|
while (gap > 1 || swapped) {
|
|
if (gap > 1) {
|
|
/*
|
|
* phi = (1 + sqrt(5)) / 2 [golden ratio]
|
|
* N = 1 / (1 - e^-phi)) = 1.247330950103979
|
|
*
|
|
* We want to but can't use floating point to calculate
|
|
* gap = (size_t)((double)gap / N)
|
|
*
|
|
* So we will use the multicative inverse of N
|
|
* (module 65536) to achieve the division.
|
|
*
|
|
* iN = 2^16 / 1.24733... = 52540
|
|
* x / N == (x * iN) / 65536
|
|
*/
|
|
gap = (gap * 52540) / 65536;
|
|
}
|
|
|
|
swapped = false;
|
|
|
|
for (size_t i = 0; gap + i < count; i++) {
|
|
if (data[i] > data[i + gap]) {
|
|
swap_data(data, i, i + gap);
|
|
swapped = true;
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
#endif
|
|
|
|
void
|
|
dump_splhist(struct cpu_info *ci, void (*pr)(const char *, ...))
|
|
{
|
|
#ifdef DIAGNOSTIC
|
|
struct cpu_softc * const cpu = ci->ci_softc;
|
|
uint64_t tbs[NIPL*NIPL];
|
|
size_t ntbs = 0;
|
|
for (size_t to = 0; to < NIPL; to++) {
|
|
for (size_t from = 0; from < NIPL; from++) {
|
|
uint64_t tb = cpu->cpu_spl_tb[to][from];
|
|
if (tb == 0)
|
|
continue;
|
|
tbs[ntbs++] = (tb << 8) | (to << 4) | from;
|
|
}
|
|
}
|
|
sort_data(tbs, ntbs);
|
|
|
|
if (pr == NULL)
|
|
pr = printf;
|
|
uint64_t last_tb = 0;
|
|
for (size_t i = 0; i < ntbs; i++) {
|
|
uint64_t tb = tbs[i];
|
|
size_t from = tb & 15;
|
|
size_t to = (tb >> 4) & 15;
|
|
tb >>= 8;
|
|
(*pr)("%s(%zu) from %zu at %"PRId64"",
|
|
from < to ? "splraise" : "splx",
|
|
to, from, tb);
|
|
if (last_tb && from != IPL_NONE)
|
|
(*pr)(" (+%"PRId64")", tb - last_tb);
|
|
(*pr)("\n");
|
|
last_tb = tb;
|
|
}
|
|
#endif
|
|
}
|