282 lines
8.2 KiB
ArmAsm
282 lines
8.2 KiB
ArmAsm
/* $NetBSD: gumstix_start.S,v 1.13 2014/05/23 13:56:18 kiyohara Exp $ */
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/*
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* Copyright (C) 2005, 2006 WIDE Project and SOUM Corporation.
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* All rights reserved.
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*
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* Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM
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* Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the project nor the name of SOUM Corporation
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE PROJECT and SOUM CORPORATION ``AS IS''
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT AND SOUM CORPORATION
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
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* Written by Hiroyuki Bessho for Genetec Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Genetec Corporation may not be used to endorse or
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* promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_cputypes.h"
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#include "opt_gumstix.h"
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#include <machine/asm.h>
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#include <arm/armreg.h>
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#include "assym.h"
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RCSID("$NetBSD: gumstix_start.S,v 1.13 2014/05/23 13:56:18 kiyohara Exp $")
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/*
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* CPWAIT -- Canonical method to wait for CP15 update.
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* NOTE: Clobbers the specified temp reg.
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* copied from arm/arm/cpufunc_asm_xscale.S
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* XXX: better be in a common header file.
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*/
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#if defined(CPU_XSCALE_PXA250) || defined(CPU_XSCALE_PXA270)
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#define CPWAIT_BRANCH \
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sub pc, pc, #4
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#else
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#define CPWAIT_BRANCH
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#endif
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#define CPWAIT(tmp) \
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mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ; \
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mov tmp, tmp /* wait for it to complete */ ; \
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CPWAIT_BRANCH /* branch to next insn */
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/*
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* Kernel start routine for GUMSTIX
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* this code is excuted at the very first after the kernel is loaded
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* by U-Boot.
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*/
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.text
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.global _C_LABEL(gumstix_start)
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_C_LABEL(gumstix_start):
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/*
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* gumstix's loader is U-boot. it's running on RAM
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*/
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/* Our page table might be cached. Disable D-cache beforehand. */
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mrc p15, 0, r4, c1, c0, 0
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bic r4, r4, #CPU_CONTROL_DC_ENABLE
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mcr p15, 0, r4, c1, c0, 0
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/*
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* Kernel is loaded in SDRAM (0xa0200000..), and is expected to run
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* in VA 0xc0200000.. (GUMSTIX)
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* VA == PA if OVERO.
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*/
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/* save u-boot's args */
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adr r4, u_boot_args
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nop
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nop
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nop
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stmia r4!, {r0, r1, r2, r3}
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nop
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nop
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nop
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/* Calculate RAM size */
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adr r4, ram_size
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#if defined(GUMSTIX)
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ldr r0, [r4]
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mrc p15, 0, r1, c0, c0, 0
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and r1, r1, #CPU_ID_XSCALE_COREGEN_MASK
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cmp r1, #0x4000
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bne 3f /* goto 3f, if basix or connex */
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0:
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/* check memory size, if verdex or verdex-pro */
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add r3, r4, r0
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ldr r1, [r3]
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cmp r0, r1
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beq 2f
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1:
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add r0, r0, r0 /* r0 <<= 1 */
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str r0, [r4]
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b 0b
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2:
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mvn r1, r1 /* r1 ^= 0xffffffff */
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str r1, [r3]
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ldr r2, [r4]
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cmp r1, r2
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beq 3f
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str r0, [r3] /* restore */
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b 1b
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3:
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#elif defined(OVERO)
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mov r1, #0x7f000000 /* mask */
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orr r1, r1, #0x00e00000 /* mask */
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mov r3, #0x6d000000 /* OMAP34xx SDRC */
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add r3, r3, #0x0080 /* CS0 MCFG */
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ldr r2, [r3]
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and r0, r1, r2, lsl #13
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add r3, r3, #0x0030 /* CS1 MCFG */
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ldr r2, [r3]
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and r2, r1, r2, lsl #13
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add r0, r0, r2
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#endif
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str r0, [r4]
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/* Build page table from scratch */
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ldr r0, Lstartup_pagetable /* pagetable */
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adr r4, mmu_init_table
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b 5f
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4:
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str r3, [r0, r2, lsl #2]
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add r2, r2, #1
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add r3, r3, #(L1_S_SIZE)
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adds r1, r1, #-1
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bhi 4b
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5:
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ldmia r4!, {r1, r2, r3} /* # of sections, PA|attr, VA */
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lsr r2, r2, #L1_S_SHIFT
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cmp r1, #0
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bne 4b
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mcr p15, 0, r0, c2, c0, 0 /* Set TTB */
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mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */
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#if defined(CPU_CORTEXA8)
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mcr p15, 0, r0, c2, c0, 1 /* Set TTB1 */
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mov r0, #TTBCR_S_N_1
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mcr p15, 0, r0, c2, c0, 2 /* Set TTBCR */
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mov r0, #0
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mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */
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#endif
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/*
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* Set the Domain Access register. Very important!
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* startup_pagetable puts to domain 0 now.
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*/
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#define KERNEL_DOMAIN(x) ((x) << (PMAP_DOMAIN_KERNEL << 1))
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mov r0, #(KERNEL_DOMAIN(DOMAIN_CLIENT) | DOMAIN_CLIENT)
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mcr p15, 0, r0, c3, c0, 0
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/* Enable MMU and etc. */
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mrc p15, 0, r0, c1, c0, 0
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#if defined(CPU_XSCALE_PXA250) || defined(CPU_XSCALE_PXA270)
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orr r0, r0, #CPU_CONTROL_SYST_ENABLE
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#endif
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#if defined(CPU_CORTEXA8)
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/* Disable L2 cache beforehand. */
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mrc p15, 0, r1, c1, c0, 1
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bic r1, r1, #0x2 /* clear L2EN */
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mcr p15, 0, r1, c1, c0, 1
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orr r0, r0, #CPU_CONTROL_AFLT_ENABLE | CPU_CONTROL_DC_ENABLE
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orr r0, r0, #CPU_CONTROL_BPRD_ENABLE | CPU_CONTROL_IC_ENABLE
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#endif
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orr r0, r0, #CPU_CONTROL_MMU_ENABLE
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mcr p15, 0, r0, c1, c0, 0
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/*
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* Ensure that the coprocessor has finished turning on the MMU.
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*/
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CPWAIT(r0)
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/* Jump to kernel code in TRUE VA */
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ldr r0, Lstart
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bx r0
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Lstart:
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.word start
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#ifndef STARTUP_PAGETABLE_ADDR
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#if defined(GUMSTIX)
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#define STARTUP_PAGETABLE_ADDR 0xa0000000 /* aligned 16kByte */
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#elif defined(OVERO)
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#define STARTUP_PAGETABLE_ADDR 0x80000000 /* aligned 16kByte */
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#endif
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#endif
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Lstartup_pagetable:
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.word STARTUP_PAGETABLE_ADDR
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.globl _C_LABEL(u_boot_args)
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u_boot_args:
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.space 16 /* r0, r1, r2, r3 */
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.globl _C_LABEL(ram_size)
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ram_size:
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.word 0x04000000 /* 64Mbyte */
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#define MMU_INIT(va, pa, n_sec, attr) \
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.word n_sec ; \
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.word (va) ; \
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.word (pa) | (attr) ;
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mmu_init_table:
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#if defined(GUMSTIX)
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/* fill all table VA==PA */
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MMU_INIT(0x00000000, 0x00000000,
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1 << (32 - L1_S_SHIFT), L1_S_PROTO | L1_S_AP_KRW)
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#define SDRAM_START 0xa0000000
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/* map SDRAM VA==PA, write-back cacheable (first 64M only)*/
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MMU_INIT(SDRAM_START, SDRAM_START,
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64, L1_S_PROTO | L1_S_C | L1_S_AP_KRW)
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/* map VA 0xc0000000..0xc3ffffff to PA 0xa0000000..0xa3ffffff */
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MMU_INIT(0xc0000000, SDRAM_START,
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64, L1_S_PROTO | L1_S_C | L1_S_AP_KRW)
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#elif defined(OVERO)
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/* fill all table VA==PA */
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MMU_INIT(0x00000000, 0x00000000,
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1 << (32 - L1_S_SHIFT), L1_S_PROTO | L1_S_APv7_KRW)
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#define SDRAM_START 0x80000000
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/* Map VA to PA, write-back cacheable (first 64M only) */
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MMU_INIT(KERNEL_BASE & 0xffffffff, SDRAM_START,
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64, L1_S_PROTO | L1_S_B | L1_S_C | L1_S_APv7_KRW)
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#endif
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MMU_INIT(0, 0, 0, 0) /* end of table */
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