23347d39ed
Adapt to new interrupt/spl framework Deal with arcbios calls being O32 and kernels being N32/N64. Need to save/restore T8 across arcbios calls.
77 lines
2.6 KiB
C
77 lines
2.6 KiB
C
/* $NetBSD: intr.h,v 1.27 2011/02/20 07:59:50 matt Exp $ */
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/*
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* Copyright (c) 2000 Soren S. Jorvang
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the
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* NetBSD Project. See http://www.NetBSD.org/ for
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* information about NetBSD.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SGIMIPS_INTR_H_
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#define _SGIMIPS_INTR_H_
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#include <mips/intr.h>
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#ifdef _KERNEL
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#ifdef __INTR_PRIVATE
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#include <sys/queue.h>
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#include <sys/types.h>
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#include <sys/evcnt.h>
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#include <mips/cpuregs.h>
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#include <mips/locore.h>
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#define NINTR 32
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struct sgimips_intrhand {
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LIST_ENTRY(sgimips_intrhand) ih_q;
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int (*ih_fun) (void *);
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void *ih_arg;
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struct sgimips_intr *ih_intrhead;
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struct sgimips_intrhand *ih_next;
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int ih_pending;
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};
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struct sgimips_intr {
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LIST_HEAD(,sgimips_intrhand) intr_q;
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struct evcnt ih_evcnt;
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unsigned long intr_ipl;
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};
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extern struct sgimips_intrhand intrtab[];
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#endif /* __INTR_PRIVATE */
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#ifndef _LOCORE
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void *cpu_intr_establish(int, int, int (*)(void *), void *);
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void mips1_fpu_intr(vaddr_t, uint32_t, uint32_t);
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#endif
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#endif /* !_KERNEL */
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#endif /* !_SGIMIPS_INTR_H_ */
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