f8bc001484
=============================================== This code enables NetBSD to support for NEC VR4181 CPU and some devices on L-Card+ board. NEC VR4181 ---------- NEC VR4181 is a embedded CPU which has MIPS processor core and integrated I/O devices within a package. The basic architecture of VR4181 is similar to other VR41xx family CPU. Some integrated devices are compatible to another VR41xx series CPU and some are not. VR4181 has integrated devices listed bellow: - Two of 16550 compatible UART - Compact Flash controller - ISA bus controller - Audio CODEC - A/D converters - LCD driver - Touch panel controller - General purpose I/O L-Card+ Embedded CPU Board -------------------------- L-Card+ is name card sized CPU board for embedded system. It is soled by Laser5 (http://www.laser5.co.jp/) with Linux installed. L-Card+ has following devices: - 16Mbyte flash memory (Intel 28F128) - 16Mbyte SDRAM - CS8900A Ethernet controller and RJ45 port - RS232C line driver and external connector - Compact Flash socket - A pair of Mezzanine connector for extension board - Some on-board LEDs Current Feature of This Code ---------------------------- Following devices are supported: - UART (used for console) - wi on Compact Flash socket - cs (CS8900A) - Flash memory (Intel 28F128 and Fujitsu MBM29LV160) - Audio Coder (limited support) -- Naoto Shimazaki
81 lines
3.7 KiB
C
81 lines
3.7 KiB
C
/* $NetBSD: vr4181dcureg.h,v 1.1 2003/05/01 07:02:04 igy Exp $ */
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/*
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Naoto Shimazaki of YOKOGAWA Electric Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* VR4181 DCU (DMA Control Unit) Registers definitions.
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* dcu1 at 0x0a000020-0x0a000047
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* dcu2 at 0x0a000650-0x0a000667
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*
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*/
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/* dcu1 registers */
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#define DCU_MICDEST1REG1_W 0x00 /* microphone destination 1 low */
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#define DCU_MICDEST1REG2_W 0x02 /* microphone destination 1 high */
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#define DCU_MICDEST2REG1_W 0x04 /* microphone destination 2 low */
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#define DCU_MICDEST2REG2_W 0x06 /* microphone destination 2 high */
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#define DCU_SPKRSRC1REG1_W 0x08 /* speaker destination 1 low */
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#define DCU_SPKRSRC1REG2_W 0x0a /* speaker destination 1 high */
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#define DCU_SPKRSRC2REG1_W 0x0c /* speaker destination 2 low */
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#define DCU_SPKRSRC2REG2_W 0x0e /* speaker destination 2 high */
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#define DCU_DMARST_REG_W 0x20 /* DMA reset */
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#define DCU_DMARST 0x0001 /* DMA reset */
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#define DCU_AIUDMAMSK_REG_W 0x26 /* audio DMA mask */
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#define DCU_ENABLE_MIC 0x0008 /* enable microphone */
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#define DCU_ENABLE_SPK 0x0004 /* enable speaker */
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/* dcu2 registers */
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#define DCU_MICRCLEN_REG_W 0x08 /* microphone record length */
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#define DCU_SPKRCLEN_REG_W 0x0a /* speaker record length */
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#define DCU_MICDMACFG_REG_W 0x0e /* microphone DMA configuration */
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#define DCU_MICLOAD 0x0100
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#define DCU_SPKDMACFG_REG_W 0x10 /* speaker DMA configuration */
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#define DCU_SPKLOAD 0x0001
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#define DCU_DMAITRQ_REG_W 0x12 /* DMA interrupt request */
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#define DCU_SPKEOP 0x20
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#define DCU_MICEOP 0x10
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#define DCU_DMACTL_REG_W 0x14 /* DMA control */
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#define DCU_SPKCNT_MSK 0xc000
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#define DCU_SPKCNT_INC 0x0000
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#define DCU_SPKCNT_DEC 0x4000
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#define DCU_MICCNT_MSK 0x3000
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#define DCU_MICCNT_INC 0x0000
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#define DCU_MICCNT_DEC 0x1000
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#define DCU_DMAITMK_REG_W 0x16 /* DMA interrupt mask */
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#define DCU_SPKEOP_ENABLE 0x0020
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#define DCU_MICEOP_ENABLE 0x0010
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