f8bc001484
=============================================== This code enables NetBSD to support for NEC VR4181 CPU and some devices on L-Card+ board. NEC VR4181 ---------- NEC VR4181 is a embedded CPU which has MIPS processor core and integrated I/O devices within a package. The basic architecture of VR4181 is similar to other VR41xx family CPU. Some integrated devices are compatible to another VR41xx series CPU and some are not. VR4181 has integrated devices listed bellow: - Two of 16550 compatible UART - Compact Flash controller - ISA bus controller - Audio CODEC - A/D converters - LCD driver - Touch panel controller - General purpose I/O L-Card+ Embedded CPU Board -------------------------- L-Card+ is name card sized CPU board for embedded system. It is soled by Laser5 (http://www.laser5.co.jp/) with Linux installed. L-Card+ has following devices: - 16Mbyte flash memory (Intel 28F128) - 16Mbyte SDRAM - CS8900A Ethernet controller and RJ45 port - RS232C line driver and external connector - Compact Flash socket - A pair of Mezzanine connector for extension board - Some on-board LEDs Current Feature of This Code ---------------------------- Following devices are supported: - UART (used for console) - wi on Compact Flash socket - cs (CS8900A) - Flash memory (Intel 28F128 and Fujitsu MBM29LV160) - Audio Coder (limited support) -- Naoto Shimazaki
112 lines
4.0 KiB
C
112 lines
4.0 KiB
C
/* $NetBSD: flashreg.h,v 1.1 2003/05/01 07:02:04 igy Exp $ */
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/*
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Naoto Shimazaki of YOKOGAWA Electric Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Intel 28F128 Flash Memory registers
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*/
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#define I28F128_BLOCK_SIZE 0x20000 /* 128Kbyte */
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#define I28F128_BLOCK_MASK 0x1ffff /* 128Kbyte */
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#define I28F128_MANUFACT 0x89
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#define I28F128_DEVCODE 0x18
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#define I28F128_PRIM_COMM0 0x01
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#define I28F128_PRIM_COMM1 0x00
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#define I28F128_PRIM_EXT_TBL0 0x31
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#define I28F128_PRIM_EXT_TBL1 0x00
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#define I28F128_RESET 0xff
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#define I28F128_READ_ARRAY I28F128_RESET
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#define I28F128_READ_ID 0x90
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#define I28F128_READ_STATUS 0x70
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#define I28F128_CLEAR_STATUS 0x50
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#define I28F128_BLK_ERASE_1ST 0x20
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#define I28F128_BLK_ERASE_2ND 0xd0
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#define I28F128_WORDBYTE_PROG 0x40
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#define I28F128_WRITE_BUFFER 0xe8
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#define I28F128_WBUF_CONFIRM 0xd0
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#define I28F128_S_READY 0x80
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#define I28F128_S_ERASE_SUSPEND 0x40
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#define I28F128_S_COMSEQ_ERROR 0x30
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#define I28F128_S_ERASE_ERROR 0x20
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#define I28F128_S_PROG_ERROR 0x10
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#define I28F128_S_LOW_VOLTAGE 0x08
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#define I28F128_S_PROG_SUSPEND 0x04
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#define I28F128_S_BLOCK_LOCKED 0x02
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#define I28F128_XS_BUF_AVAIL 0x80
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#define I28F128_BUFFER_SIZE 0x20
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#define I28F128_BLOCK_ERASE_TIME 1000000 /* usec */
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#define I28F128_WRITE_BUFFER_TIMEOUT 800 /* usec */
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#define I28F128_WRITE_WORD_TIMEOUT 800 /* usec */
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#define MBM29LV160_MANUFACT 0x04
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#define MBM29LV160TE_DEVCODE 0x22c4
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#define MBM29LV160BE_DEVCODE 0x2249
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#define MBM29LV160_SUBSECT_MASK 0x000f8000
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#define MBM29LV160TE_SUBSECT_ADDR 0x000f8000
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#define MBM29LV160BE_SUBSECT_ADDR 0x00000000
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#define MBM29LV160_COMM_ADDR0 (0x555 << 1)
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#define MBM29LV160_COMM_ADDR1 (0x2aa << 1)
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#define MBM29LV160_COMM_ADDR2 (0x555 << 1)
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#define MBM29LV160_COMM_ADDR3 (0x555 << 1)
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#define MBM29LV160_COMM_ADDR4 (0x2aa << 1)
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#define MBM29LV160_COMM_ADDR5 (0x555 << 1)
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#define MBM29LV160_COMM_CMD0 0xaa
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#define MBM29LV160_COMM_CMD1 0x55
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#define MBM29LV160_SIGN_CMD2 0x90
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#define MBM29LV160_PROG_CMD2 0xa0
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#define MBM29LV160_ESECT_CMD2 0x80
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#define MBM29LV160_ESECT_CMD3 0xaa
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#define MBM29LV160_ESECT_CMD4 0x55
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#define MBM29LV160_ESECT_CMD5 0x30
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#define MBM29LV160_DEVCODE_REG 0x02
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#define MBM29LV160_SECT_SIZE 0x00010000
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#define MBM29LV160_SUBSECT_SIZE 0x00002000
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