685 lines
16 KiB
C
685 lines
16 KiB
C
/* $NetBSD: isadma.c,v 1.31 1997/08/30 17:33:49 augustss Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Device driver for the ISA on-board DMA controller.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <machine/bus.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <dev/isa/isadmareg.h>
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/* Used by isa_malloc() */
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#include <sys/malloc.h>
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struct isa_mem {
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struct device *isadev;
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int chan;
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bus_size_t size;
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bus_addr_t addr;
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caddr_t kva;
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struct isa_mem *next;
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} *isa_mem_head = 0;
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/*
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* High byte of DMA address is stored in this DMAPG register for
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* the Nth DMA channel.
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*/
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static int dmapageport[2][4] = {
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{0x7, 0x3, 0x1, 0x2},
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{0xf, 0xb, 0x9, 0xa}
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};
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static u_int8_t dmamode[4] = {
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DMA37MD_READ | DMA37MD_SINGLE,
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DMA37MD_WRITE | DMA37MD_SINGLE,
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DMA37MD_READ | DMA37MD_SINGLE | DMA37MD_LOOP,
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DMA37MD_WRITE | DMA37MD_SINGLE | DMA37MD_LOOP
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};
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static inline void isa_dmaunmask __P((struct isa_softc *, int));
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static inline void isa_dmamask __P((struct isa_softc *, int));
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static inline void
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isa_dmaunmask(sc, chan)
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struct isa_softc *sc;
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int chan;
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{
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int ochan = chan & 3;
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/* set dma channel mode, and set dma channel mode */
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if ((chan & 4) == 0)
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bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
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DMA1_SMSK, ochan | DMA37SM_CLEAR);
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else
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bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
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DMA2_SMSK, ochan | DMA37SM_CLEAR);
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}
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static inline void
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isa_dmamask(sc, chan)
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struct isa_softc *sc;
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int chan;
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{
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int ochan = chan & 3;
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/* set dma channel mode, and set dma channel mode */
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if ((chan & 4) == 0) {
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bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
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DMA1_SMSK, ochan | DMA37SM_SET);
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bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
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DMA1_FFC, 0);
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} else {
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bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
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DMA2_SMSK, ochan | DMA37SM_SET);
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bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
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DMA2_FFC, 0);
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}
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}
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/*
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* isa_dmacascade(): program 8237 DMA controller channel to accept
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* external dma control by a board.
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*/
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void
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isa_dmacascade(isadev, chan)
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struct device *isadev;
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int chan;
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{
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struct isa_softc *sc = (struct isa_softc *)isadev;
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int ochan = chan & 3;
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if (chan < 0 || chan > 7) {
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printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
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goto lose;
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}
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if (ISA_DRQ_ISFREE(sc, chan) == 0) {
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printf("%s: DRQ %d is not free\n", sc->sc_dev.dv_xname, chan);
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goto lose;
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}
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ISA_DRQ_ALLOC(sc, chan);
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/* set dma channel mode, and set dma channel mode */
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if ((chan & 4) == 0)
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bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
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DMA1_MODE, ochan | DMA37MD_CASCADE);
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else
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bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
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DMA2_MODE, ochan | DMA37MD_CASCADE);
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isa_dmaunmask(sc, chan);
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return;
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lose:
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panic("isa_dmacascade");
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}
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int
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isa_dmamap_create(isadev, chan, size, flags)
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struct device *isadev;
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int chan;
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bus_size_t size;
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int flags;
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{
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struct isa_softc *sc = (struct isa_softc *)isadev;
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bus_size_t maxsize;
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if (chan < 0 || chan > 7) {
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printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
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goto lose;
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}
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if (chan & 4)
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maxsize = (1 << 17);
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else
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maxsize = (1 << 16);
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if (size > maxsize)
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return (EINVAL);
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if (ISA_DRQ_ISFREE(sc, chan) == 0) {
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printf("%s: drq %d is not free\n", sc->sc_dev.dv_xname, chan);
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goto lose;
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}
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ISA_DRQ_ALLOC(sc, chan);
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return (bus_dmamap_create(sc->sc_dmat, size, 1, size, maxsize,
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flags, &sc->sc_dmamaps[chan]));
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lose:
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panic("isa_dmamap_create");
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}
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void
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isa_dmamap_destroy(isadev, chan)
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struct device *isadev;
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int chan;
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{
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struct isa_softc *sc = (struct isa_softc *)isadev;
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if (chan < 0 || chan > 7) {
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printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
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goto lose;
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}
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if (ISA_DRQ_ISFREE(sc, chan)) {
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printf("%s: drq %d is already free\n",
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sc->sc_dev.dv_xname, chan);
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goto lose;
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}
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ISA_DRQ_FREE(sc, chan);
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bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamaps[chan]);
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return;
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lose:
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panic("isa_dmamap_destroy");
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}
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/*
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* isa_dmastart(): program 8237 DMA controller channel and set it
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* in motion.
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*/
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int
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isa_dmastart(isadev, chan, addr, nbytes, p, flags, busdmaflags)
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struct device *isadev;
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int chan;
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void *addr;
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bus_size_t nbytes;
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struct proc *p;
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int flags;
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int busdmaflags;
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{
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struct isa_softc *sc = (struct isa_softc *)isadev;
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bus_dmamap_t dmam;
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bus_addr_t dmaaddr;
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int waport;
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int ochan = chan & 3;
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int error;
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if (chan < 0 || chan > 7) {
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printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
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goto lose;
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}
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#ifdef ISADMA_DEBUG
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printf("isa_dmastart: drq %d, addr %p, nbytes 0x%lx, p %p, "
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"flags 0x%x, dmaflags 0x%x\n",
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chan, addr, nbytes, p, flags, busdmaflags);
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#endif
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if (chan & 4) {
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if (nbytes > (1 << 17) || nbytes & 1 || (u_long)addr & 1) {
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printf("%s: drq %d, nbytes 0x%lx, addr %p\n",
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sc->sc_dev.dv_xname, chan, nbytes, addr);
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goto lose;
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}
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} else {
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if (nbytes > (1 << 16)) {
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printf("%s: drq %d, nbytes 0x%lx\n",
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sc->sc_dev.dv_xname, chan, nbytes);
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goto lose;
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}
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}
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dmam = sc->sc_dmamaps[chan];
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if (dmam == NULL)
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panic("isa_dmastart: no DMA map for chan %d\n", chan);
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error = bus_dmamap_load(sc->sc_dmat, dmam, addr, nbytes,
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p, busdmaflags);
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if (error)
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return (error);
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#ifdef ISADMA_DEBUG
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__asm(".globl isa_dmastart_afterload ; isa_dmastart_afterload:");
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#endif
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if (flags & DMAMODE_READ) {
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bus_dmamap_sync(sc->sc_dmat, dmam, BUS_DMASYNC_PREREAD);
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sc->sc_dmareads |= (1 << chan);
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} else {
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bus_dmamap_sync(sc->sc_dmat, dmam, BUS_DMASYNC_PREWRITE);
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sc->sc_dmareads &= ~(1 << chan);
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}
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dmaaddr = dmam->dm_segs[0].ds_addr;
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#ifdef ISADMA_DEBUG
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printf(" dmaaddr 0x%lx\n", dmaaddr);
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__asm(".globl isa_dmastart_aftersync ; isa_dmastart_aftersync:");
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#endif
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sc->sc_dmalength[chan] = nbytes;
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isa_dmamask(sc, chan);
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sc->sc_dmafinished &= ~(1 << chan);
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if ((chan & 4) == 0) {
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/* set dma channel mode */
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bus_space_write_1(sc->sc_iot, sc->sc_dma1h, DMA1_MODE,
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ochan | dmamode[flags]);
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/* send start address */
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waport = DMA1_CHN(ochan);
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bus_space_write_1(sc->sc_iot, sc->sc_dmapgh,
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dmapageport[0][ochan], (dmaaddr >> 16) & 0xff);
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bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport,
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dmaaddr & 0xff);
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bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport,
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(dmaaddr >> 8) & 0xff);
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/* send count */
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bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1,
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(--nbytes) & 0xff);
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bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1,
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(nbytes >> 8) & 0xff);
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} else {
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/* set dma channel mode */
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bus_space_write_1(sc->sc_iot, sc->sc_dma2h, DMA2_MODE,
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ochan | dmamode[flags]);
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/* send start address */
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waport = DMA2_CHN(ochan);
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bus_space_write_1(sc->sc_iot, sc->sc_dmapgh,
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dmapageport[1][ochan], (dmaaddr >> 16) & 0xff);
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dmaaddr >>= 1;
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bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport,
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dmaaddr & 0xff);
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bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport,
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(dmaaddr >> 8) & 0xff);
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/* send count */
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nbytes >>= 1;
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bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2,
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(--nbytes) & 0xff);
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bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2,
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(nbytes >> 8) & 0xff);
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}
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isa_dmaunmask(sc, chan);
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return (0);
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lose:
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panic("isa_dmastart");
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}
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void
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isa_dmaabort(isadev, chan)
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struct device *isadev;
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int chan;
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{
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struct isa_softc *sc = (struct isa_softc *)isadev;
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if (chan < 0 || chan > 7) {
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printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
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panic("isa_dmaabort");
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}
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isa_dmamask(sc, chan);
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bus_dmamap_unload(sc->sc_dmat, sc->sc_dmamaps[chan]);
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sc->sc_dmareads &= ~(1 << chan);
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}
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bus_size_t
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isa_dmacount(isadev, chan)
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struct device *isadev;
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int chan;
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{
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struct isa_softc *sc = (struct isa_softc *)isadev;
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int waport;
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bus_size_t nbytes;
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int ochan = chan & 3;
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if (chan < 0 || chan > 7) {
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printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
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panic("isa_dmacount");
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}
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isa_dmamask(sc, chan);
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/*
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* We have to shift the byte count by 1. If we're in auto-initialize
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* mode, the count may have wrapped around to the initial value. We
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* can't use the TC bit to check for this case, so instead we compare
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* against the original byte count.
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* If we're not in auto-initialize mode, then the count will wrap to
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* -1, so we also handle that case.
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*/
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if ((chan & 4) == 0) {
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waport = DMA1_CHN(ochan);
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nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma1h,
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waport + 1) + 1;
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nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma1h,
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waport + 1) << 8;
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nbytes &= 0xffff;
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} else {
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waport = DMA2_CHN(ochan);
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nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma2h,
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waport + 2) + 1;
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nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma2h,
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waport + 2) << 8;
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nbytes <<= 1;
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nbytes &= 0x1ffff;
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}
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if (nbytes == sc->sc_dmalength[chan])
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nbytes = 0;
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isa_dmaunmask(sc, chan);
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return (nbytes);
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}
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int
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isa_dmafinished(isadev, chan)
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struct device *isadev;
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int chan;
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{
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struct isa_softc *sc = (struct isa_softc *)isadev;
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if (chan < 0 || chan > 7) {
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printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
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panic("isa_dmafinished");
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}
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/* check that the terminal count was reached */
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if ((chan & 4) == 0)
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sc->sc_dmafinished |= bus_space_read_1(sc->sc_iot,
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sc->sc_dma1h, DMA1_SR) & 0x0f;
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else
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sc->sc_dmafinished |= (bus_space_read_1(sc->sc_iot,
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sc->sc_dma2h, DMA2_SR) & 0x0f) << 4;
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return ((sc->sc_dmafinished & (1 << chan)) != 0);
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}
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void
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isa_dmadone(isadev, chan)
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struct device *isadev;
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int chan;
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{
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struct isa_softc *sc = (struct isa_softc *)isadev;
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bus_dmamap_t dmam;
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if (chan < 0 || chan > 7) {
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printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
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panic("isa_dmadone");
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}
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dmam = sc->sc_dmamaps[chan];
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isa_dmamask(sc, chan);
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if (isa_dmafinished(isadev, chan) == 0)
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printf("%s: isa_dmadone: channel %d not finished\n",
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sc->sc_dev.dv_xname, chan);
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bus_dmamap_sync(sc->sc_dmat, dmam,
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(sc->sc_dmareads & (1 << chan)) ? BUS_DMASYNC_POSTREAD :
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(sc->sc_dmat, dmam);
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sc->sc_dmareads &= ~(1 << chan);
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}
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int
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isa_dmamem_alloc(isadev, chan, size, addrp, flags)
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struct device *isadev;
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int chan;
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bus_size_t size;
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bus_addr_t *addrp;
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int flags;
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{
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struct isa_softc *sc = (struct isa_softc *)isadev;
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bus_dma_segment_t seg;
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int error, boundary, rsegs;
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if (chan < 0 || chan > 7) {
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printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
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panic("isa_dmamem_alloc");
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}
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boundary = (chan & 4) ? (1 << 17) : (1 << 16);
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size = round_page(size);
|
|
|
|
error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, boundary,
|
|
&seg, 1, &rsegs, flags);
|
|
if (error)
|
|
return (error);
|
|
|
|
*addrp = seg.ds_addr;
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
isa_dmamem_free(isadev, chan, addr, size)
|
|
struct device *isadev;
|
|
int chan;
|
|
bus_addr_t addr;
|
|
bus_size_t size;
|
|
{
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
bus_dma_segment_t seg;
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
panic("isa_dmamem_free");
|
|
}
|
|
|
|
seg.ds_addr = addr;
|
|
seg.ds_len = size;
|
|
|
|
bus_dmamem_free(sc->sc_dmat, &seg, 1);
|
|
}
|
|
|
|
int
|
|
isa_dmamem_map(isadev, chan, addr, size, kvap, flags)
|
|
struct device *isadev;
|
|
int chan;
|
|
bus_addr_t addr;
|
|
bus_size_t size;
|
|
caddr_t *kvap;
|
|
int flags;
|
|
{
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
bus_dma_segment_t seg;
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
panic("isa_dmamem_map");
|
|
}
|
|
|
|
seg.ds_addr = addr;
|
|
seg.ds_len = size;
|
|
|
|
return (bus_dmamem_map(sc->sc_dmat, &seg, 1, size, kvap, flags));
|
|
}
|
|
|
|
void
|
|
isa_dmamem_unmap(isadev, chan, kva, size)
|
|
struct device *isadev;
|
|
int chan;
|
|
caddr_t kva;
|
|
size_t size;
|
|
{
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
panic("isa_dmamem_unmap");
|
|
}
|
|
|
|
bus_dmamem_unmap(sc->sc_dmat, kva, size);
|
|
}
|
|
|
|
int
|
|
isa_dmamem_mmap(isadev, chan, addr, size, off, prot, flags)
|
|
struct device *isadev;
|
|
int chan;
|
|
bus_addr_t addr;
|
|
bus_size_t size;
|
|
int off, prot, flags;
|
|
{
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
bus_dma_segment_t seg;
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
panic("isa_dmamem_mmap");
|
|
}
|
|
|
|
seg.ds_addr = addr;
|
|
seg.ds_len = size;
|
|
|
|
return (bus_dmamem_mmap(sc->sc_dmat, &seg, 1, off, prot, flags));
|
|
}
|
|
|
|
int
|
|
isa_drq_isfree(isadev, chan)
|
|
struct device *isadev;
|
|
int chan;
|
|
{
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
if (chan < 0 || chan > 7) {
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
panic("isa_drq_isfree");
|
|
}
|
|
return ISA_DRQ_ISFREE(sc, chan);
|
|
}
|
|
|
|
void *
|
|
isa_malloc(isadev, chan, size, pool, flags)
|
|
struct device *isadev;
|
|
int chan;
|
|
size_t size;
|
|
int pool;
|
|
int flags;
|
|
{
|
|
bus_addr_t addr;
|
|
caddr_t kva;
|
|
int bflags;
|
|
struct isa_mem *m;
|
|
|
|
bflags = flags & M_WAITOK ? BUS_DMA_WAITOK : BUS_DMA_NOWAIT;
|
|
|
|
if (isa_dmamem_alloc(isadev, chan, size, &addr, bflags))
|
|
return 0;
|
|
if (isa_dmamem_map(isadev, chan, addr, size, &kva, bflags)) {
|
|
isa_dmamem_free(isadev, chan, addr, size);
|
|
return 0;
|
|
}
|
|
m = malloc(sizeof(*m), pool, flags);
|
|
if (m == 0) {
|
|
isa_dmamem_unmap(isadev, chan, kva, size);
|
|
isa_dmamem_free(isadev, chan, addr, size);
|
|
return 0;
|
|
}
|
|
m->isadev = isadev;
|
|
m->chan = chan;
|
|
m->size = size;
|
|
m->addr = addr;
|
|
m->kva = kva;
|
|
m->next = isa_mem_head;
|
|
isa_mem_head = m;
|
|
return (void *)kva;
|
|
}
|
|
|
|
void
|
|
isa_free(addr, pool)
|
|
void *addr;
|
|
int pool;
|
|
{
|
|
struct isa_mem **mp, *m;
|
|
caddr_t kva = (caddr_t)addr;
|
|
|
|
for(mp = &isa_mem_head; *mp && (*mp)->kva != kva; mp = &(*mp)->next)
|
|
;
|
|
m = *mp;
|
|
if (!m) {
|
|
printf("isa_free: freeing unallocted memory\n");
|
|
return;
|
|
}
|
|
*mp = m->next;
|
|
isa_dmamem_unmap(m->isadev, m->chan, kva, m->size);
|
|
isa_dmamem_free(m->isadev, m->chan, m->addr, m->size);
|
|
free(m, pool);
|
|
}
|
|
|
|
int
|
|
isa_mappage(mem, off, prot)
|
|
void *mem;
|
|
int off;
|
|
int prot;
|
|
{
|
|
/* XXX switch to bus_mmap when it works */
|
|
#if 0
|
|
struct isa_mem *m;
|
|
|
|
for(m = isa_mem_head; m && m->kva != (caddr_t)mem; m = m->next)
|
|
;
|
|
if (!m) {
|
|
printf("isa_mappage: mapping unallocted memory\n");
|
|
return -1;
|
|
}
|
|
return isa_dmamem_mmap(m->isadev, m->chan, m->addr,
|
|
m->size, off, prot, BUS_DMA_WAITOK);
|
|
#else
|
|
#ifdef i386
|
|
return i386_btop(vtophys((caddr_t)mem + off));
|
|
#else
|
|
return -1;
|
|
#endif
|
|
#endif
|
|
}
|