138 lines
3.9 KiB
C
138 lines
3.9 KiB
C
/* $NetBSD: i80321_intr.h,v 1.8 2006/04/10 03:36:03 simonb Exp $ */
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/*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _I80321_INTR_H_
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#define _I80321_INTR_H_
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#define ARM_IRQ_HANDLER _C_LABEL(i80321_intr_dispatch)
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#ifndef _LOCORE
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#include <arm/armreg.h>
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#include <arm/cpufunc.h>
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#include <arm/xscale/i80321reg.h>
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void i80321_do_pending(void);
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static inline void __attribute__((__unused__))
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i80321_set_intrmask(void)
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{
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extern volatile uint32_t intr_enabled;
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__asm volatile("mcr p6, 0, %0, c0, c0, 0"
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:
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: "r" (intr_enabled & ICU_INT_HWMASK));
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}
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#define INT_SWMASK \
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((1U << ICU_INT_bit26) | (1U << ICU_INT_bit22) | \
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(1U << ICU_INT_bit5) | (1U << ICU_INT_bit4))
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static inline void __attribute__((__unused__))
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i80321_splx(int new)
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{
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extern volatile uint32_t intr_enabled;
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extern volatile int current_spl_level;
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extern volatile int i80321_ipending;
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extern void i80321_do_pending(void);
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int oldirqstate, hwpend;
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/* Don't let the compiler re-order this code with preceding code */
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__insn_barrier();
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current_spl_level = new;
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hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~new;
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if (hwpend != 0) {
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oldirqstate = disable_interrupts(I32_bit);
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intr_enabled |= hwpend;
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i80321_set_intrmask();
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restore_interrupts(oldirqstate);
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}
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if ((i80321_ipending & INT_SWMASK) & ~new)
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i80321_do_pending();
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}
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static inline int __attribute__((__unused__))
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i80321_splraise(int ipl)
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{
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extern volatile int current_spl_level;
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extern int i80321_imask[];
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int old;
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old = current_spl_level;
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current_spl_level |= i80321_imask[ipl];
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/* Don't let the compiler re-order this code with subsequent code */
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__insn_barrier();
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return (old);
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}
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static inline int __attribute__((__unused__))
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i80321_spllower(int ipl)
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{
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extern volatile int current_spl_level;
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extern int i80321_imask[];
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int old = current_spl_level;
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i80321_splx(i80321_imask[ipl]);
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return(old);
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}
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#if !defined(EVBARM_SPL_NOINLINE)
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#define splx(new) i80321_splx(new)
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#define _spllower(ipl) i80321_spllower(ipl)
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#define _splraise(ipl) i80321_splraise(ipl)
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void _setsoftintr(int);
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#else
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int _splraise(int);
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int _spllower(int);
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void splx(int);
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void _setsoftintr(int);
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#endif /* ! EVBARM_SPL_NOINLINE */
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#endif /* _LOCORE */
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#endif /* _I80321_INTR_H_ */
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