426 lines
10 KiB
C
426 lines
10 KiB
C
/* $NetBSD: pci_machdep.c,v 1.10 1998/03/10 11:43:11 leo Exp $ */
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/*
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* Copyright (c) 1996 Leo Weppelman. All rights reserved.
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* Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <machine/cpu.h>
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#include <machine/iomap.h>
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#include <machine/mfp.h>
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#include <machine/bus.h>
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#include <atari/atari/device.h>
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/*
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* I/O and memory we assume 'reserved' when an vga card is detected on
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* the PCI-bus.
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*/
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#define MAX_VGA_MEM 0x1000000 /* 16 MB mem */
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#define MAX_VGA_IO 0x0010000 /* 64 KB io */
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int pcibusprint __P((void *auxp, const char *));
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int pcibusmatch __P((struct device *, struct cfdata *, void *));
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void pcibusattach __P((struct device *, struct device *, void *));
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static int pci_config_offset __P((pcitag_t));
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struct cfattach pcibus_ca = {
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sizeof(struct device), pcibusmatch, pcibusattach
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};
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int
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pcibusmatch(pdp, cfp, auxp)
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struct device *pdp;
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struct cfdata *cfp;
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void *auxp;
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{
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if(atari_realconfig == 0)
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return (0);
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if (strcmp((char *)auxp, "pcibus") || cfp->cf_unit != 0)
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return(0);
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return(machineid & ATARI_HADES ? 1 : 0);
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}
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void
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pcibusattach(pdp, dp, auxp)
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struct device *pdp, *dp;
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void *auxp;
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{
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struct pcibus_attach_args pba;
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pba.pba_busname = "pci";
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pba.pba_pc = NULL;
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pba.pba_bus = 0;
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pba.pba_iot = PCI_IO_PHYS;
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pba.pba_memt = PCI_MEM_PHYS;
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pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
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pba.pba_dmat = BUS_PCI_DMA_TAG;
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MFP2->mf_aer &= ~(0x27); /* PCI interrupts: HIGH -> LOW */
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printf("\n");
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config_found(dp, &pba, pcibusprint);
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}
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int
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pcibusprint(auxp, name)
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void *auxp;
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const char *name;
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{
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if(name == NULL)
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return(UNCONF);
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return(QUIET);
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}
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void
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pci_attach_hook(parent, self, pba)
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struct device *parent, *self;
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struct pcibus_attach_args *pba;
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{
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}
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/*
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* Initialize the PCI-bus. The Atari-BIOS does not do this, so....
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*/
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void
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init_pci_bus()
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{
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pci_chipset_tag_t pc = NULL; /* XXX */
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pcitag_t tag;
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pcireg_t csr, address, mask;
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int device, id, class, maxndevs;
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int reg;
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u_int32_t membase, iobase;
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tag = 0;
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id = class = 0;
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membase = iobase = 0;
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maxndevs = pci_bus_maxdevs(pc, 0);
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/*
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* Scan the bus for prehistory (usually VGA) devices.
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*/
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for (device = 0; device < maxndevs; device++) {
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tag = pci_make_tag(pc, 0, device, 0);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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if (id == 0 || id == 0xffffffff)
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continue;
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class = pci_conf_read(pc, tag, PCI_CLASS_REG);
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switch (PCI_CLASS(class)) {
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case PCI_CLASS_PREHISTORIC:
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case PCI_CLASS_DISPLAY:
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membase = MAX_VGA_MEM;
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iobase = MAX_VGA_IO;
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}
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}
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for (device = 0; device < maxndevs; device++) {
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tag = pci_make_tag(pc, 0, device, 0);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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if (id == 0 || id == 0xffffffff)
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continue;
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class = pci_conf_read(pc, tag, PCI_CLASS_REG);
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switch (PCI_CLASS(class)) {
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case PCI_CLASS_PREHISTORIC:
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case PCI_CLASS_DISPLAY:
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/*
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* XXX: We rely on the BIOS to do the
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* right thing here. Eventually, we should
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* take the initiative...
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*/
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continue;
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}
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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csr &= ~(PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
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csr &= ~PCI_COMMAND_MASTER_ENABLE;
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pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
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int size, type;
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address = pci_conf_read(pc, tag, reg);
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pci_conf_write(pc, tag, reg, 0xffffffff);
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mask = pci_conf_read(pc, tag, reg);
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pci_conf_write(pc, tag, reg, address);
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if (mask == 0)
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continue; /* Register unused */
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if (mask & PCI_MAPREG_TYPE_IO) {
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csr |= PCI_COMMAND_IO_ENABLE;
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address = PCI_MAPREG_IO_ADDR(mask);
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mask = (~address << 1) | 1;
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size = (mask & address) & 0xffffffff;
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address = iobase | PCI_MAPREG_TYPE_IO;
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iobase += roundup(size, 4096); /* XXX */
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}
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else {
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type = PCI_MAPREG_MEM_TYPE(address);
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switch (type) {
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case PCI_MAPREG_MEM_TYPE_32BIT:
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break;
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case PCI_MAPREG_MEM_TYPE_64BIT:
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reg++;
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case PCI_MAPREG_MEM_TYPE_32BIT_1M:
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/*
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* XXX: We can do better here!
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*/
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if (membase >= 0x100000)
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continue;
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}
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csr |= PCI_COMMAND_MEM_ENABLE;
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size = PCI_MAPREG_MEM_SIZE(mask);
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address = membase | PCI_MAPREG_TYPE_MEM;
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membase += roundup(size, 4096); /* XXX */
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}
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pci_conf_write(pc, tag, reg, address);
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}
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csr |= PCI_COMMAND_MASTER_ENABLE;
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pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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/*
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* Both interrupt pin & line are set to the device (== slot)
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* number. This makes sense on the atari because the
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* individual slots are hard-wired to a specific MFP-pin.
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*/
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csr = (device << PCI_INTERRUPT_PIN_SHIFT);
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csr |= (device << PCI_INTERRUPT_LINE_SHIFT);
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pci_conf_write(pc, tag, PCI_INTERRUPT_REG, csr);
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}
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}
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/*
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* Atari_init.c maps the config areas NBPG bytes apart....
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*/
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static int pci_config_offset(tag)
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pcitag_t tag;
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{
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int device;
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device = (tag >> 11) & 0x1f;
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return(device * NBPG);
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}
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int
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pci_bus_maxdevs(pc, busno)
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pci_chipset_tag_t pc;
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int busno;
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{
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return (4);
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}
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pcitag_t
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pci_make_tag(pc, bus, device, function)
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pci_chipset_tag_t pc;
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int bus, device, function;
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{
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return ((bus << 16) | (device << 11) | (function << 8));
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}
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pcireg_t
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pci_conf_read(pc, tag, reg)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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{
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u_long data;
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data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg);
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return (bswap32(data));
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}
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void
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pci_conf_write(pc, tag, reg, data)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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pcireg_t data;
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{
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*((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg))
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= bswap32(data);
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}
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int
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pci_intr_map(pc, intrtag, pin, line, ihp)
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pci_chipset_tag_t pc;
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pcitag_t intrtag;
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int pin, line;
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pci_intr_handle_t *ihp;
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{
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/*
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* According to the PCI-spec, 255 means `unknown' or `no connection'.
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* Interpret this as 'no interrupt assigned'.
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*/
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if (line == 255) {
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*ihp = -1;
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return 1;
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}
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/*
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* Values are pretty useless because the on the Hades all interrupt
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* lines for a card are tied together and hardwired to the TT-MFP
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* I/O port.
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*/
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*ihp = line;
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return 0;
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}
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const char *
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pci_intr_string(pc, ih)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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{
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static char irqstr[8]; /* 4 + 2 + NULL + sanity */
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if (ih == -1)
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panic("pci_intr_string: bogus handle 0x%x\n", ih);
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sprintf(irqstr, "irq %d", ih);
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return (irqstr);
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}
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/*
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* The interrupt stuff is rather ugly. On the Hades, all interrupt lines
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* for a slot are wired together and connected to IO 0,1,2 or 5 (slots:
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* (0-3) on the TT-MFP. The Pci-config code initializes the irq. number
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* to the slot position.
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*/
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static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } };
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static int iifun __P((int, int));
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static int
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iifun(slot, sr)
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int slot;
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int sr;
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{
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pci_intr_info_t *iinfo_p;
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int s;
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iinfo_p = &iinfo[slot];
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/*
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* Disable the interrupts
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*/
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MFP2->mf_imrb &= ~iinfo_p->imask;
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if ((sr & PSL_IPL) >= iinfo_p->ipl) {
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/*
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* We're running at a too high priority now.
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*/
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add_sicallback((si_farg)iifun, (void*)slot, 0);
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}
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else {
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s = splx(iinfo_p->ipl);
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(void) (iinfo_p->ifunc)(iinfo_p->iarg);
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splx(s);
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/*
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* Re-enable interrupts after handling
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*/
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MFP2->mf_imrb |= iinfo_p->imask;
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}
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return 1;
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}
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void *
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pci_intr_establish(pc, ih, level, ih_fun, ih_arg)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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int level;
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int (*ih_fun) __P((void *));
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void *ih_arg;
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{
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pci_intr_info_t *iinfo_p;
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struct intrhand *ihand;
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int slot;
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slot = ih;
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iinfo_p = &iinfo[slot];
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if (iinfo_p->ipl > 0)
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panic("pci_intr_establish: interrupt was already established\n");
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ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0,
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(hw_ifun_t)iifun, (void *)slot);
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if (ihand != NULL) {
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iinfo_p->ipl = level;
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iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot);
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iinfo_p->ifunc = ih_fun;
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iinfo_p->iarg = ih_arg;
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iinfo_p->ihand = ihand;
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/*
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* Enable (unmask) the interrupt
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*/
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MFP2->mf_imrb |= iinfo_p->imask;
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MFP2->mf_ierb |= iinfo_p->imask;
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return(iinfo_p);
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}
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return NULL;
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}
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void
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pci_intr_disestablish(pc, cookie)
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pci_chipset_tag_t pc;
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void *cookie;
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{
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pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie;
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if (iinfo->ipl < 0)
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panic("pci_intr_disestablish: interrupt was not established\n");
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MFP2->mf_imrb &= ~iinfo->imask;
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MFP2->mf_ierb &= ~iinfo->imask;
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(void) intr_disestablish(iinfo_p->ihand);
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iinfo_p->ipl = -1;
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}
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