110 lines
3.0 KiB
C
110 lines
3.0 KiB
C
/* $NetBSD: jensenioreg.h,v 1.4 2012/02/06 02:14:14 matt Exp $ */
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* System register description for the DECpc AXP 150 ("Jensen").
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*/
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#define REGVAL(r) (*(volatile uint64_t *)ALPHA_PHYS_TO_K0SEG(r))
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/*
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* EISA Interrupt Acknowledge: 1.0000.0000
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*/
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#define JENSEN_EISA_INTA 0x100000000UL
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/*
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* FEPROM 0 (256K): 1.8000.0000
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*/
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#define JENSEN_FEPROM0 0x180000000UL
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/*
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* FEPROM 1 (1M): 1.a000.0000
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*/
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#define JENSEN_FEPROM1 0x1a0000000UL
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/*
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* VLSI VL82C106 junk I/O chip: 1.C000.0000
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*/
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#define JENSEN_VL82C106 0x1c0000000UL
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/*
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* Host Address Extension Register: 1.D000.0000
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*
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* 8-bit register that contains the upper bigs of address
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* destined for the EISA bus.
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*/
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#define JENSEN_HAE 0x1d0000000UL
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#define HAE_MASK 0x7 /* EISA <31:25> */
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#define HAE_SHIFT 25
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/*
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* System Control Register: 1.E000.0000
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*
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* 8-bit register that contains memory configuration information
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* and the LED display code bits.
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*
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* Memory configuration:
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*
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* 0 4M x 36 SIMMs
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* 1 4M x 36 x 2 SIMMs
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* 2 16M x 36 SIMMs
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* 3 16M x 36 x 2 SIMMs
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*/
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#define JENSEN_SYSCTL 0x1e0000000UL
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#define SYSCTL_LEDMASK 0x0f /* LED codes */
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#define SYSCTL_BANK0_CFG 0x30 /* Bank 0 config */
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#define SYSCTL_BANK0_CFG_SHIFT 4
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#define SYSCTL_BANK1_CFG 0xc0 /* Bank 1 config */
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#define SYSCTL_BANK1_CFG_SHIFT 6
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/*
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* Spare Register: 1.f000.0000
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*/
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#define JENSEN_SPARE 0x1f0000000UL
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/*
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* EISA Memory Space: 2.0000.0000
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*/
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#define JENSEN_EISA_MEM 0x200000000UL
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/*
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* EISA I/O Space: 3.0000.0000
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*/
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#define JENSEN_EISA_IO 0x300000000UL
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