035ceca5b2
are combined into the same (write-only!) control register.
123 lines
4.5 KiB
C
123 lines
4.5 KiB
C
/* $NetBSD: intersil7170.h,v 1.4 2000/11/11 11:18:07 pk Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Adam Glass.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _INTERSIL7170_H
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#define _INTERSIL7170_H
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/*
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* Driver support for the intersil7170 used in sun[34]s to provide
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* real time clock and time-of-day support.
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*
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* Derived from: datasheet "ICM7170 a uP-Compatible Real-Time Clock"
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* document #301680-005, Dec 85
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*
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* Note that this device provides both time-of-day and interval timer
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* functionality. Both functions use the same control registers. On top
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* of that, the command control register is write-only. Currently, this
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* driver assumes that the interval timer is to be enabled, and hence
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* always sets/restores the INTERSIL_CMD_IENABLE control bit when
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* manipulating the TOD.
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*/
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struct intersil_dt { /* from p. 7 of 10 */
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u_int8_t dt_csec;
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u_int8_t dt_hour;
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u_int8_t dt_min;
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u_int8_t dt_sec;
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u_int8_t dt_month;
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u_int8_t dt_day;
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u_int8_t dt_year;
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u_int8_t dt_dow;
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};
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struct intersil7170 {
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struct intersil_dt counters;
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struct intersil_dt clk_ram; /* should be ok as both are word aligned */
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u_int8_t clk_intr_reg;
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u_int8_t clk_cmd_reg;
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};
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/* Indices to time-of-day clock registers */
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#define INTERSIL_ICSEC 0
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#define INTERSIL_IHOUR 1
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#define INTERSIL_IMIN 2
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#define INTERSIL_ISEC 3
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#define INTERSIL_IMON 4
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#define INTERSIL_IDAY 5
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#define INTERSIL_IYEAR 6
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#define INTERSIL_IDOW 7
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#define INTERSIL_IINTR 16
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#define INTERSIL_ICMD 17
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/* bit assignments for command register, p. 6 of 10, write-only */
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#define INTERSIL_CMD_FREQ_32K 0x0
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#define INTERSIL_CMD_FREQ_1M 0x1
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#define INTERSIL_CMD_FREQ_2M 0x2
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#define INTERSIL_CMD_FREQ_4M 0x3
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#define INTERSIL_CMD_12HR_MODE 0x0
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#define INTERSIL_CMD_24HR_MODE 0x4
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#define INTERSIL_CMD_STOP 0x0
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#define INTERSIL_CMD_RUN 0x8
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#define INTERSIL_CMD_IDISABLE 0x0
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#define INTERSIL_CMD_IENABLE 0x10
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#define INTERSIL_CMD_TEST_MODE 0x20
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#define INTERSIL_CMD_NORMAL_MODE 0x0
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/* bit assignments for interrupt register r/w, p 7 of 10 */
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#define INTERSIL_INTER_ALARM 0x1 /* r/w */
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#define INTERSIL_INTER_CSECONDS 0x2 /* r/w */
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#define INTERSIL_INTER_DSECONDS 0x4 /* r/w */
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#define INTERSIL_INTER_SECONDS 0x8 /* r/w */
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#define INTERSIL_INTER_MINUTES 0x10 /* r/w */
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#define INTERSIL_INTER_HOURS 0x20 /* r/w */
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#define INTERSIL_INTER_DAYS 0x40 /* r/w */
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#define INTERSIL_INTER_PENDING 0x80 /* read-only */
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#define INTERSIL_INTER_BITS "\20\10PENDING\7DAYS\6HRS\5MIN\4SCDS\3DSEC\2CSEC\1ALARM"
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#ifndef sun3 /* XXX sun3 does not use MI driver, which needs bus_space(9) */
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todr_chip_handle_t intersil7170_attach(bus_space_tag_t, bus_space_handle_t, int);
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#endif
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#endif /* _INTERSIL7170_H */
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