49b8e36112
Also make the interrupt handler for older 3com cards look like the xl one. I.e. don't ack the interrupt latch bit before checking if it is set. At the same time, introduce constants for the watched interrupts, so that we don't copy them all over the place.
329 lines
10 KiB
C
329 lines
10 KiB
C
/* $NetBSD: elinkxlreg.h,v 1.10 2001/12/28 20:35:47 christos Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Frank van der Linden.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file defines the registers specific to the EtherLink XL family
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* of NICs.
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*/
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#define EEPROM_SOFTINFO3 0x15 /* Software info #3 */
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#define EEPROM_SUBVENDOR_ELXL 0x17 /* Subsys vendor id */
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#define EEPROM_SUBSYSID 0x18 /* Subsys id */
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#define EEPROM_MEDIA 0x19 /* Media options (90xB) */
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#define EEPROM_CHECKSUM_ELXL 0x20 /* EEPROM checksum */
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#define READ_EEPROM8 0x0200 /* 8 bit EEPROM read command */
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/*
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* Flat address space registers (outside the windows)
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*/
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#define ELINK_TXPKTID 0x18 /* 90xB only */
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#define ELINK_TIMER 0x1a
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#define ELINK_TXSTATUS 0x1b
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#define ELINK_INTSTATUSAUTO 0x1e
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#define ELINK_DMACTRL 0x20
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# define ELINK_DMAC_DNCMPLREQ 0x00000002
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# define ELINK_DMAC_DNSTALLED 0x00000004
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# define ELINK_DMAC_UPCOMPLETE 0x00000008
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# define ELINK_DMAC_DNCOMPLETE 0x00000010
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# define ELINK_DMAC_UPRXEAREN 0x00000020
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# define ELINK_DMAC_ARNCNTDN 0x00000040
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# define ELINK_DMAC_DNINPROG 0x00000080
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# define ELINK_DMAC_CNTSPEED 0x00000100
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# define ELINK_DMAC_CNTDNMODE 0x00000200
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# define ELINK_DMAC_ALTSEQDIS 0x00010000
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# define ELINK_DMAC_DEFEATMWI 0x00100000
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# define ELINK_DMAC_DEFEATMRL 0x00200000
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# define ELINK_DMAC_UPOVERDIS 0x00400000
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# define ELINK_DMAC_TARGABORT 0x40000000
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# define ELINK_DMAC_MSTRABORT 0x80000000
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#define ELINK_DNLISTPTR 0x24
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#define ELINK_DNBURSTTHRESH 0x2a /* 90xB only */
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#define ELINK_DNPRIOTHRESH 0x2c /* 90xB only */
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#define ELINK_DNPOLL 0x2d /* 90xB only */
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#define ELINK_TXFREETHRESH 0x2f /* 90x only */
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#define ELINK_UPPKTSTATUS 0x30
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#define ELINK_FREETIMER 0x34
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#define ELINK_COUNTDOWN 0x36
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#define ELINK_UPLISTPTR 0x38
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#define ELINK_UPPRIOTHRESH 0x3c /* 90xB only */
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#define ELINK_UPPOLL 0x3d /* 90xB only */
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#define ELINK_UPBURSTTHRESH 0x3e /* 90xB only */
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#define ELINK_REALTIMECNT 0x40 /* 90xB only */
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#define ELINK_DNMAXBURST 0x78 /* 90xB only */
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#define ELINK_UPMAXBURST 0x7a /* 90xB only */
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/*
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* This is reset options for the other cards, media options for
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* the 90xB NICs. Reset options are in a separate register for
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* the 90xB.
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*/
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#define ELINK_W3_MEDIA_OPTIONS 0x08
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# define ELINK_MEDIACAP_100BASET4 0x0001
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# define ELINK_MEDIACAP_100BASETX 0x0002
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# define ELINK_MEDIACAP_100BASEFX 0x0004
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# define ELINK_MEDIACAP_10BASET 0x0008
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# define ELINK_MEDIACAP_10BASE2 0x0010
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# define ELINK_MEDIACAP_10BASE5 0x0020
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# define ELINK_MEDIACAP_MII 0x0040
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# define ELINK_MEDIACAP_10BASEFL 0x0080
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/*
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* Reset options for the 90xB
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*/
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#define ELINK_W2_RESET_OPTIONS 0x0c
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# define ELINK_RESET_OPT_LEDPOLAR 0x0010
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# define ELINK_RESET_OPT_PHYPOWER 0x4000
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/*
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* Window 4, offset 8 is defined for MII/PHY access for EtherLink XL
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* cards.
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*/
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#define ELINK_W4_PHYSMGMT 0x08
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# define ELINK_PHY_CLK 0x0001
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# define ELINK_PHY_DATA 0x0002
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# define ELINK_PHY_DIR 0x0004
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/*
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* Counter in window 4 for packets with a bad start-of-stream delimiter/
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*/
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#define ELINK_W4_BADSSD 0x0c
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#define ELINK_W4_UBYTESOK 0x0d
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/*
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* Define for extra multicast hash filter bit implemented in the 90xB
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*/
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#define FIL_MULTIHASH 0x10
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/*
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* Defines for the interrupt status register, only for the 90x[B]
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*/
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#define HOST_ERROR 0x0002
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#define LINK_EVENT 0x0100
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#define DN_COMPLETE 0x0200
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#define UP_COMPLETE 0x0400
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#define XL_WATCHED_INTERRUPTS \
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(HOST_ERROR | TX_COMPLETE | UPD_STATS | DN_COMPLETE | UP_COMPLETE)
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/*
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* Window 7 registers. These are different for 90x and 90xB than
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* for the EtherLink III / Fast EtherLink cards.
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*/
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#define ELINK_W7_VLANMASK 0x00 /* 90xB only */
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#define ELINK_W7_VLANTYPE 0x04 /* 90xB only */
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#define ELINK_W7_TIMER 0x0a /* 90x only */
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#define ELINK_W7_TX_STATUS 0x0b /* 90x only */
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#define ELINK_W7_POWEREVENT 0x0c /* 90xB only */
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#define ELINK_W7_INTSTATUS 0x0e
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/*
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* Command definitions.
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*/
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#define ELINK_UPSTALL 0x3000
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#define ELINK_UPUNSTALL 0x3001
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#define ELINK_DNSTALL 0x3002
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#define ELINK_DNUNSTALL 0x3003
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#define ELINK_TXRECLTHRESH 0xc000
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#define ELINK_TXSTARTTHRESH 0x9800
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#define ELINK_SETHASHFILBIT 0xcc00
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/*
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* The Internal Config register is different on 90xB cards. The
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* different masks / shifts are defined here.
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*/
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/*
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* Lower 16 bits.
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*/
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#define CONFIG_TXLARGE (u_int16_t) 0x4000
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#define CONFIG_TXLARGE_SHIFT 14
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#define CONFIG_RXLARGE (u_int16_t) 0x8000
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#define CONFIG_RXLARGE_SHIFT 15
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/*
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* Upper 16 bits.
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*/
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#define CONFIG_XCVR_SEL (u_int16_t) 0x00f0
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#define CONFIG_XCVR_SEL_SHIFT 4
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#define ELINKMEDIA_AUTO 8
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#define CONFIG_AUTOSEL (u_int16_t) 0x0100
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#define CONFIG_AUTOSEL_SHIFT 8
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#define CONFIG_DISABLEROM (u_int16_t) 0x0200
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#define CONFIG_DISABLEROM_SHIFT 9
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/*
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* ID of internal PHY.
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*/
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#define ELINK_INTPHY_ID 24
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/*
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* Fragment header as laid out in memory for DMA access.
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*/
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struct ex_fraghdr {
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volatile u_int32_t fr_addr; /* phys addr of frag */
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volatile u_int32_t fr_len; /* length of frag */
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};
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#define EX_FR_LENMASK 0x00001fff /* mask for length in fr_len field */
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#define EX_FR_LAST 0x80000000 /* indicates last fragment */
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#define EX_NDPD 256
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#define EX_NUPD 128
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/*
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* Note: the number of receive fragments in an UPD is 1, since we're
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* receiving into one contiguous mbuf.
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*/
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#define EX_NRFRAGS 1 /* # fragments in rcv pkt (< 64) */
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#define EX_NTFRAGS 32 /* # fragments in tx pkt (< 64) */
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/*
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* Type 0 Download Packet Descriptor (DPD).
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*/
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struct ex_dpd {
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volatile u_int32_t dpd_nextptr; /* prt to next fragheader */
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volatile u_int32_t dpd_fsh; /* frame start header */
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volatile struct ex_fraghdr dpd_frags[EX_NTFRAGS];
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};
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/*
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* Type 1 DPD, supported by 90xB.
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*/
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struct ex_dpd1 {
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volatile u_int32_t dpd_nextptr;
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volatile u_int32_t dpd_schedtime; /* time to download */
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volatile u_int32_t dpd_fsh;
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volatile struct ex_fraghdr dpd_frags[EX_NTFRAGS];
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};
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struct ex_upd {
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volatile u_int32_t upd_nextptr;
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volatile u_int32_t upd_pktstatus;
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volatile struct ex_fraghdr upd_frags[EX_NRFRAGS];
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};
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/*
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* Higher level linked list of upload packet descriptors.
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*/
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struct ex_rxdesc {
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struct ex_rxdesc *rx_next;
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struct mbuf *rx_mbhead;
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bus_dmamap_t rx_dmamap;
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struct ex_upd *rx_upd;
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};
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/*
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* .. and for download packet descriptors.
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*/
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struct ex_txdesc {
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struct ex_txdesc *tx_next;
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struct mbuf *tx_mbhead;
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bus_dmamap_t tx_dmamap;
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struct ex_dpd *tx_dpd;
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};
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#define DPD_DMADDR(s,t) \
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((s)->sc_dpddma + ((caddr_t)((t)->tx_dpd) - (caddr_t)((s)->sc_dpd)))
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/*
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* Frame Start Header bitfields.
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*/
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#define EX_DPD_DNIND 0x80000000 /* intr on download done */
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#define EX_DPD_TXIND 0x00008000 /* intr on tx done */
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#define EX_DPD_NOCRC 0x00002000 /* no CRC append */
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/*
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* Lower 12 bits are the tx length for the 90x family. The 90xB
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* assumes that the tx length is the sum of all frame lengths,
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* and uses the bits as below. It also defines some more bits in
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* the upper part.
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*/
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#define EX_DPD_EMPTY 0x20000000 /* no data in this DPD */
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#define EX_DPD_UPDEFEAT 0x10000000 /* don't round tx lengths up */
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#define EX_DPD_UDPCKSUM 0x08000000 /* do hardware UDP checksum */
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#define EX_DPD_TCPCKSUM 0x04000000 /* do hardware TCP checksum */
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#define EX_DPD_IPCKSUM 0x02000000 /* do hardware IP checksum */
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#define EX_DPD_DNCMPLT 0x01000000 /* packet has been downloaded */
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#define EX_DPD_IDMASK 0x000003fc /* mask for packet id */
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# define EX_DPD_IDSHIFT 2
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#define EX_DPD_RNDMASK 0x00000003 /* mask for rounding */
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/* 0 -> dword, 2 -> word, 1,3 -> none */
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/*
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* Schedtime bitfields.
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*/
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#define EX_SCHED_TIMEVALID 0x20000000 /* field contains value */
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#define EX_SCHED_LDCOUNT 0x10000000 /* load schedtime onto NIC */
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#define EX_SCHED_TIMEMASK 0x00ffffff
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/*
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* upd_pktstatus bitfields.
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* The *CKSUMERR fields are only valid if the matching *CHECKED field
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* is set.
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*/
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#define EX_UPD_PKTLENMASK 0x00001fff /* 12:0 -> packet length */
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#define EX_UPD_ERROR 0x00004000 /* rcv error */
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#define EX_UPD_COMPLETE 0x00008000 /* rcv complete */
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#define EX_UPD_OVERRUN 0x00010000 /* rcv overrun */
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#define EX_UPD_RUNT 0x00020000 /* pkt < 60 bytes */
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#define EX_UPD_ALIGNERR 0x00040000 /* alignment error */
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#define EX_UPD_CRCERR 0x00080000 /* CRC error */
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#define EX_UPD_OVERSIZED 0x00100000 /* oversize frame */
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#define EX_UPD_DRIBBLEBITS 0x00800000 /* pkt had dribble bits */
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#define EX_UPD_OVERFLOW 0x01000000 /* insufficient space for pkt */
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#define EX_UPD_IPCKSUMERR 0x02000000 /* IP cksum error (90xB) */
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#define EX_UPD_TCPCKSUMERR 0x04000000 /* TCP cksum error (90xB) */
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#define EX_UPD_UDPCKSUMERR 0x08000000 /* UDP cksum error (90xB) */
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#define EX_UPD_IPCHECKED 0x20000000 /* IP cksum done */
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#define EX_UPD_TCPCHECKED 0x40000000 /* TCP cksum done */
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#define EX_UPD_UDPCHECKED 0x80000000 /* UDP cksum done */
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#define EX_UPD_ERR 0x001f4000 /* Errors we check for */
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#define EX_UPD_ERR_VLAN 0x000f0000 /* same for 802.1q */
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