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NetBSD/sys/arch/alpha/pci
History
thorpej b0ce38fd8a Switch to the new `evcnt' mechanism for counting interrupts. Maintain 
a per-CPU interrupt counter for clock, device, and interprocessor
interrupts.
2000-06-05 21:47:26 +00:00
..
a12c_bus_mem.c implement bus_space_vaddr() 2000-04-17 17:24:48 +00:00
a12c_dma.c Use the more consistent register field names & add ctags(1) keys. 1998-03-02 07:07:41 +00:00
a12c_pci.c Use the more consistent register field names & add ctags(1) keys. 1998-03-02 07:07:41 +00:00
a12c.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
a12creg.h Support attachment of xb and a12dc, define most of the remaining 1998-03-02 06:56:16 +00:00
a12cvar.h Support attachment of xb and a12dc, define most of the remaining 1998-03-02 06:56:16 +00:00
apecs_bus_io.c
apecs_bus_mem.c
apecs_dma.c vm_offset_t -> {paddr_t,vaddr_t}, vm_size_t -> vsize_t 1998-08-14 16:50:00 +00:00
apecs_pci.c * sprintf -> snprintf 1999-06-29 17:10:57 +00:00
apecs.c - Add a bus space method for getting the translation for a window. 2000-02-26 18:53:10 +00:00
apecsreg.h
apecsvar.h
cia_bwx_bus_io.c CIA core logic with BWX enabled appears on both EV56 and PCA56. We 1999-12-02 19:43:25 +00:00
cia_bwx_bus_mem.c CIA core logic with BWX enabled appears on both EV56 and PCA56. We 1999-12-02 19:43:25 +00:00
cia_dma.c If we have a Pyxis with the DMA page crossing bug, don't allow coalescing 2000-02-06 01:26:50 +00:00
cia_pci.c * sprintf -> snprintf 1999-06-29 17:10:57 +00:00
cia_swiz_bus_io.c
cia_swiz_bus_mem.c
cia.c Use the new cpu_amask variable rather than calling alpha_implver() and 2000-04-03 01:48:07 +00:00
ciareg.h Define a REGVAL64() for some Pyxis registers. 1998-06-06 20:40:14 +00:00
ciavar.h Put the code that enables/disables Pyxis interrupt lines in 2000-03-19 01:43:25 +00:00
dwlpx_bus_io.c
dwlpx_bus_mem.c
dwlpx_dma.c Fix garbled words in copyright statement. 1999-04-06 19:26:32 +00:00
dwlpx_pci.c oops on byte enables for TurboLaser systems 1998-04-15 00:48:58 +00:00
dwlpx.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
dwlpxreg.h add some error defintions 1998-03-21 22:02:42 +00:00
dwlpxvar.h removal of unneeded define 1998-04-15 00:49:17 +00:00
irongate_bus_io.c Add support for the Alpha Processor, Inc. UP1000 EV6 system. 2000-06-01 20:30:28 +00:00
irongate_bus_mem.c Add support for the Alpha Processor, Inc. UP1000 EV6 system. 2000-06-01 20:30:28 +00:00
irongate_dma.c Add support for the Alpha Processor, Inc. UP1000 EV6 system. 2000-06-01 20:30:28 +00:00
irongate_pci.c Add support for the Alpha Processor, Inc. UP1000 EV6 system. 2000-06-01 20:30:28 +00:00
irongate.c Add support for the Alpha Processor, Inc. UP1000 EV6 system. 2000-06-01 20:30:28 +00:00
irongatereg.h Add support for the Alpha Processor, Inc. UP1000 EV6 system. 2000-06-01 20:30:28 +00:00
irongatevar.h Add support for the Alpha Processor, Inc. UP1000 EV6 system. 2000-06-01 20:30:28 +00:00
lca_bus_io.c
lca_bus_mem.c
lca_dma.c vm_offset_t -> {paddr_t,vaddr_t}, vm_size_t -> vsize_t 1998-08-14 16:50:00 +00:00
lca_pci.c
lca.c - Add a bus space method for getting the translation for a window. 2000-02-26 18:53:10 +00:00
lcareg.h
lcavar.h
mcpcia_bus_io.c CHIP_EX_MALLOC_SAFE() now must pay attention in class. 1999-04-15 22:31:16 +00:00
mcpcia_bus_mem.c CHIP_EX_MALLOC_SAFE() now must pay attention in class. 1999-04-15 22:31:16 +00:00
mcpcia_dma.c Fix a silly bug present since rev 1.1; the direct-mapped window is 1999-04-15 23:47:52 +00:00
mcpcia_pci.c remove the unneccessary alpha_mbs and slight cleanup 1998-05-05 22:01:54 +00:00
mcpcia.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
mcpciareg.h Add support for a single statically-allocated MCPCIA configuration structure, 1999-04-15 22:27:40 +00:00
mcpciavar.h Add SGMAP stuff for Window 2, and rename Window 0's SGMAP stuff to indicate 1999-04-16 02:18:07 +00:00
pci_550.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_550.h Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_1000.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_1000.h New platforms: Mikasa and Mikasa/Pinnacle, aka Pinkasa. 1998-06-26 21:45:56 +00:00
pci_1000a.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_1000a.h Kill off some EVCNT_COUNTERS calls, since [A] it has to be rewritten anyway 1998-06-26 21:59:46 +00:00
pci_2100_a50.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_2100_a50.h
pci_6600.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_6600.h Support for EV6 Tsunami core logic and system type 6600. 1999-06-29 06:46:46 +00:00
pci_a12.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_a12.h Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_alphabook1.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_alphabook1.h Very preliminary support for the Tadpole/DEC AlphaBook. These are basically 1998-06-26 05:42:34 +00:00
pci_axppci_33.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_axppci_33.h
pci_bwx_bus_io_chipdep.c implement bus_space_vaddr() 2000-04-17 17:24:48 +00:00
pci_bwx_bus_mem_chipdep.c implement bus_space_vaddr() 2000-04-17 17:24:48 +00:00
pci_eb64plus_intr.s
pci_eb64plus.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_eb64plus.h Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
pci_eb66_intr.s Take a stab at EB66 support. An EB66 is basically an EB64+ with a 1998-06-27 10:10:51 +00:00
pci_eb66.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
pci_eb66.h Take a stab at EB66 support. An EB66 is basically an EB64+ with a 1998-06-27 10:10:51 +00:00
pci_eb164_intr.s
pci_eb164.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_eb164.h Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:10 +00:00
pci_kn8ae.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
pci_kn8ae.h Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
pci_kn20aa.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
pci_kn20aa.h Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
pci_kn300.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
pci_kn300.h Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
pci_machdep.c pull in new PC display headers 1998-05-28 16:59:31 +00:00
pci_sgmap_pte32.c
pci_sgmap_pte32.h Spaicing for 32 bit ptes (dwlpx only, really) is 0x20, not 1 1998-03-23 07:09:12 +00:00
pci_sgmap_pte64.c
pci_sgmap_pte64.h
pci_swiz_bus_io_chipdep.c implement bus_space_vaddr() 2000-04-17 17:24:48 +00:00
pci_swiz_bus_mem_chipdep.c implement bus_space_vaddr() 2000-04-17 17:24:48 +00:00
pci_up1000.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
pci_up1000.h Add support for the Alpha Processor, Inc. UP1000 EV6 system. 2000-06-01 20:30:28 +00:00
pciide_machdep.c Fix a typo. 1998-04-18 01:09:20 +00:00
sio_pic.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
sio.c Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
sioreg.h
siovar.h Switch to the new `evcnt' mechanism for counting interrupts. Maintain 2000-06-05 21:47:26 +00:00
tsc.c Allow rd/line, rd/mult, and wr/inval. 1999-11-04 19:15:22 +00:00
tsp_bus_io.c CIA core logic with BWX enabled appears on EV6. We require at least 1999-12-02 19:43:58 +00:00
tsp_bus_mem.c CIA core logic with BWX enabled appears on EV6. We require at least 1999-12-02 19:43:58 +00:00
tsp_dma.c Support for EV6 Tsunami core logic and system type 6600. 1999-06-29 06:46:46 +00:00
tsp_pci.c Support for EV6 Tsunami core logic and system type 6600. 1999-06-29 06:46:46 +00:00
tsreg.h Support for EV6 Tsunami core logic and system type 6600. 1999-06-29 06:46:46 +00:00
tsvar.h Support for EV6 Tsunami core logic and system type 6600. 1999-06-29 06:46:46 +00:00