301 lines
7.7 KiB
Plaintext
301 lines
7.7 KiB
Plaintext
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
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* M68000 Hi-Performance Microprocessor Division
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* M68040 Software Package
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*
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* M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
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* All rights reserved.
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*
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* THE SOFTWARE is provided on an "AS IS" basis and without warranty.
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* To the maximum extent permitted by applicable law,
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* MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
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* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
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* PARTICULAR PURPOSE and any warranty against infringement with
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* regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
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* and any accompanying written materials.
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*
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* To the maximum extent permitted by applicable law,
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* IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
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* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
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* PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
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* OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
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* SOFTWARE. Motorola assumes no responsibility for the maintenance
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* and support of the SOFTWARE.
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*
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* You are hereby granted a copyright license to use, modify, and
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* distribute the SOFTWARE so long as this entire notice is retained
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* without alteration in any modified and/or redistributed versions,
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* and that such modified versions are clearly identified as such.
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* No licenses are granted by implication, estoppel or otherwise
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* under any patents or trademarks of Motorola, Inc.
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*
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* x_snan.sa 3.3 7/1/91
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*
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* fpsp_snan --- FPSP handler for signalling NAN exception
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*
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* SNAN for float -> integer conversions (integer conversion of
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* an SNAN) is a non-maskable run-time exception.
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*
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* For trap disabled the 040 does the following:
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* If the dest data format is s, d, or x, then the SNAN bit in the NAN
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* is set to one and the resulting non-signaling NAN (truncated if
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* necessary) is transferred to the dest. If the dest format is b, w,
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* or l, then garbage is written to the dest (actually the upper 32 bits
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* of the mantissa are sent to the integer unit).
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*
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* For trap enabled the 040 does the following:
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* If the inst is move_out, then the results are the same as for trap
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* disabled with the exception posted. If the instruction is not move_
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* out, the dest. is not modified, and the exception is posted.
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*
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X_SNAN IDNT 2,1 Motorola 040 Floating Point Software Package
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section 8
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include fpsp.h
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xref get_fline
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xref mem_write
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xref real_snan
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xref real_inex
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xref fpsp_done
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xref reg_dest
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xdef fpsp_snan
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fpsp_snan:
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link a6,#-LOCAL_SIZE
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fsave -(a7)
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movem.l d0-d1/a0-a1,USER_DA(a6)
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fmovem.x fp0-fp3,USER_FP0(a6)
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fmovem.l fpcr/fpsr/fpiar,USER_FPCR(a6)
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*
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* Check if trap enabled
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*
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btst.b #snan_bit,FPCR_ENABLE(a6)
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bne.b ena ;If enabled, then branch
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bsr.l move_out ;else SNAN disabled
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*
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* It is possible to have an inex1 exception with the
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* snan. If the inex enable bit is set in the FPCR, and either
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* inex2 or inex1 occured, we must clean up and branch to the
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* real inex handler.
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*
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ck_inex:
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move.b FPCR_ENABLE(a6),d0
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and.b FPSR_EXCEPT(a6),d0
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andi.b #$3,d0
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beq.w end_snan
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*
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* Inexact enabled and reported, and we must take an inexact exception.
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*
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take_inex:
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move.b #INEX_VEC,EXC_VEC+1(a6)
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movem.l USER_DA(a6),d0-d1/a0-a1
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fmovem.x USER_FP0(a6),fp0-fp3
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fmovem.l USER_FPCR(a6),fpcr/fpsr/fpiar
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frestore (a7)+
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unlk a6
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bra.l real_inex
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*
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* SNAN is enabled. Check if inst is move_out.
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* Make any corrections to the 040 output as necessary.
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*
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ena:
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btst.b #5,CMDREG1B(a6) ;if set, inst is move out
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beq.w not_out
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bsr.l move_out
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report_snan:
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move.b (a7),VER_TMP(a6)
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cmpi.b #VER_40,(a7) ;test for orig unimp frame
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bne.b ck_rev
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moveq.l #13,d0 ;need to zero 14 lwords
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bra.b rep_con
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ck_rev:
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moveq.l #11,d0 ;need to zero 12 lwords
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rep_con:
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clr.l (a7)
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loop1:
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clr.l -(a7) ;clear and dec a7
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dbra.w d0,loop1
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move.b VER_TMP(a6),(a7) ;format a busy frame
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move.b #BUSY_SIZE-4,1(a7)
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move.l USER_FPSR(a6),FPSR_SHADOW(a6)
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or.l #sx_mask,E_BYTE(a6)
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movem.l USER_DA(a6),d0-d1/a0-a1
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fmovem.x USER_FP0(a6),fp0-fp3
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fmovem.l USER_FPCR(a6),fpcr/fpsr/fpiar
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frestore (a7)+
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unlk a6
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bra.l real_snan
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*
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* Exit snan handler by expanding the unimp frame into a busy frame
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*
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end_snan:
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bclr.b #E1,E_BYTE(a6)
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move.b (a7),VER_TMP(a6)
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cmpi.b #VER_40,(a7) ;test for orig unimp frame
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bne.b ck_rev2
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moveq.l #13,d0 ;need to zero 14 lwords
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bra.b rep_con2
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ck_rev2:
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moveq.l #11,d0 ;need to zero 12 lwords
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rep_con2:
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clr.l (a7)
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loop2:
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clr.l -(a7) ;clear and dec a7
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dbra.w d0,loop2
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move.b VER_TMP(a6),(a7) ;format a busy frame
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move.b #BUSY_SIZE-4,1(a7) ;write busy size
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move.l USER_FPSR(a6),FPSR_SHADOW(a6)
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or.l #sx_mask,E_BYTE(a6)
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movem.l USER_DA(a6),d0-d1/a0-a1
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fmovem.x USER_FP0(a6),fp0-fp3
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fmovem.l USER_FPCR(a6),fpcr/fpsr/fpiar
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frestore (a7)+
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unlk a6
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bra.l fpsp_done
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*
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* Move_out
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*
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move_out:
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move.l EXC_EA(a6),a0 ;get <ea> from exc frame
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bfextu CMDREG1B(a6){3:3},d0 ;move rx field to d0{2:0}
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tst.l d0 ;check for long
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beq.b sto_long ;branch if move_out long
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cmpi.l #4,d0 ;check for word
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beq.b sto_word ;branch if move_out word
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cmpi.l #6,d0 ;check for byte
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beq.b sto_byte ;branch if move_out byte
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*
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* Not byte, word or long
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*
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rts
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*
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* Get the 32 most significant bits of etemp mantissa
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*
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sto_long:
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move.l ETEMP_HI(a6),d1
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move.l #4,d0 ;load byte count
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*
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* Set signalling nan bit
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*
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bset.l #30,d1
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*
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* Store to the users destination address
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*
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tst.l a0 ;check if <ea> is 0
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beq.b wrt_dn ;destination is a data register
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move.l d1,-(a7) ;move the snan onto the stack
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move.l a0,a1 ;load dest addr into a1
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move.l a7,a0 ;load src addr of snan into a0
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bsr.l mem_write ;write snan to user memory
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move.l (a7)+,d1 ;clear off stack
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rts
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*
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* Get the 16 most significant bits of etemp mantissa
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*
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sto_word:
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move.l ETEMP_HI(a6),d1
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move.l #2,d0 ;load byte count
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*
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* Set signalling nan bit
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*
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bset.l #30,d1
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*
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* Store to the users destination address
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*
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tst.l a0 ;check if <ea> is 0
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beq.b wrt_dn ;destination is a data register
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move.l d1,-(a7) ;move the snan onto the stack
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move.l a0,a1 ;load dest addr into a1
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move.l a7,a0 ;point to low word
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bsr.l mem_write ;write snan to user memory
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move.l (a7)+,d1 ;clear off stack
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rts
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*
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* Get the 8 most significant bits of etemp mantissa
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*
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sto_byte:
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move.l ETEMP_HI(a6),d1
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move.l #1,d0 ;load byte count
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*
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* Set signalling nan bit
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*
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bset.l #30,d1
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*
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* Store to the users destination address
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*
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tst.l a0 ;check if <ea> is 0
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beq.b wrt_dn ;destination is a data register
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move.l d1,-(a7) ;move the snan onto the stack
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move.l a0,a1 ;load dest addr into a1
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move.l a7,a0 ;point to source byte
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bsr.l mem_write ;write snan to user memory
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move.l (a7)+,d1 ;clear off stack
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rts
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*
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* wrt_dn --- write to a data register
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*
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* We get here with D1 containing the data to write and D0 the
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* number of bytes to write: 1=byte,2=word,4=long.
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*
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wrt_dn:
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move.l d1,L_SCR1(a6) ;data
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move.l d0,-(a7) ;size
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bsr.l get_fline ;returns fline word in d0
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move.l d0,d1
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andi.l #$7,d1 ;d1 now holds register number
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move.l (sp)+,d0 ;get original size
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cmpi.l #4,d0
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beq.b wrt_long
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cmpi.l #2,d0
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bne.b wrt_byte
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wrt_word:
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or.l #$8,d1
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bra.l reg_dest
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wrt_long:
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or.l #$10,d1
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bra.l reg_dest
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wrt_byte:
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bra.l reg_dest
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*
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* Check if it is a src nan or dst nan
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*
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not_out:
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move.l DTAG(a6),d0
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bfextu d0{0:3},d0 ;isolate dtag in lsbs
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cmpi.b #3,d0 ;check for nan in destination
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bne.b issrc ;destination nan has priority
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dst_nan:
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btst.b #6,FPTEMP_HI(a6) ;check if dest nan is an snan
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bne.b issrc ;no, so check source for snan
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move.w FPTEMP_EX(a6),d0
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bra.b cont
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issrc:
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move.w ETEMP_EX(a6),d0
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cont:
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btst.l #15,d0 ;test for sign of snan
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beq.b clr_neg
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bset.b #neg_bit,FPSR_CC(a6)
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bra.w report_snan
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clr_neg:
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bclr.b #neg_bit,FPSR_CC(a6)
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bra.w report_snan
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end
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