913 lines
28 KiB
C
913 lines
28 KiB
C
/* $NetBSD: odroid_machdep.c,v 1.39 2014/09/30 14:24:26 reinoud Exp $ */
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/*
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* Copyright (c) 2014 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Reinoud Zandijk.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: odroid_machdep.c,v 1.39 2014/09/30 14:24:26 reinoud Exp $");
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#include "opt_evbarm_boardtype.h"
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#include "opt_exynos.h"
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#include "opt_machdep.h"
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#include "opt_ddb.h"
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#include "opt_kgdb.h"
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#include "opt_ipkdb.h"
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#include "opt_md.h"
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#include "opt_sscom.h"
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#include "opt_arm_debug.h"
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#include "ukbd.h"
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#include "arml2cc.h" // RPZ why is it not called opt_l2cc.h?
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/device.h>
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#include <sys/exec.h>
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#include <sys/kernel.h>
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#include <sys/ksyms.h>
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#include <sys/msgbuf.h>
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#include <sys/proc.h>
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#include <sys/reboot.h>
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#include <sys/termios.h>
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#include <sys/gpio.h>
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#include <uvm/uvm_extern.h>
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#include <sys/conf.h>
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#include <dev/cons.h>
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#include <dev/md.h>
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#include <machine/db_machdep.h>
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#include <ddb/db_sym.h>
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#include <ddb/db_extern.h>
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#ifdef KGDB
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#include <sys/kgdb.h>
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#endif
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#include <machine/bootconfig.h>
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#include <arm/armreg.h>
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#include <arm/undefined.h>
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#include <arm/cortex/pl310_var.h>
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#include <arm/arm32/machdep.h>
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#include <arm/mainbus/mainbus.h>
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#include <arm/samsung/exynos4_reg.h>
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#include <arm/samsung/exynos5_reg.h>
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#include <arm/samsung/exynos_var.h>
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#include <evbarm/include/autoconf.h>
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#include <evbarm/odroid/platform.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/ddcreg.h>
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#include <dev/usb/ukbdvar.h>
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#include <net/if_ether.h>
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/* sanity checks */
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#ifndef EXYNOS4
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#ifndef EXYNOS5
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#error Please define _either_ an EXYNOS4 or an EXYNOS5 cpu, not mixed
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#endif
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#endif
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/* serial console stuff */
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#include "sscom.h"
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#include "opt_sscom.h"
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#if defined(KGDB) || \
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defined(SSCOM0CONSOLE) || defined(SSCOM1CONSOLE) || \
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defined(SSCOM2CONSOLE) || defined(SSCOM3CONSOLE)
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#if NSSCOM == 0
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#error must define sscom for use with serial console or KGD
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#endif
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#include <arm/samsung/sscom_var.h>
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#include <arm/samsung/sscom_reg.h>
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extern const int num_exynos_uarts_entries;
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extern const struct sscom_uart_info exynos_uarts[];
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/* sanity checks for serial console */
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#ifndef CONSPEED
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#define CONSPEED 115200
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#endif /* CONSPEED */
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#ifndef CONMODE
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#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB | HUPCL)) | CS8) /* 8N1 */
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#endif /* CONMODE */
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// __CTASSERT(EXYNOS_CORE_PBASE + EXYNOS_UART0_OFFSET <= CONADDR);
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// __CTASSERT(CONADDR <= EXYNOS_CORE_PBASE + EXYNOS_UART4_OFFSET);
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// __CTASSERT(CONADDR % EXYNOS_BLOCK_SIZE == 0);
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//static const bus_addr_t conaddr = CONADDR;
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static const int conspeed = CONSPEED;
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static const int conmode = CONMODE;
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#endif /*defined(KGDB) || defined(SSCOM*CONSOLE) */
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/*
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* uboot passes 4 arguments to us.
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*
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* arg0 arg1 arg2 arg3 : the `bootargs' environment variable from the uboot
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* context (in PA!)
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*
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* Note that the storage has to be in .data and not in .bss. On kernel start
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* the .bss is cleared and this information would get lost.
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*/
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uintptr_t uboot_args[4] = { 0 };
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/*
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* argument and boot configure storage
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*/
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BootConfig bootconfig; /* for pmap's sake */
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char bootargs[MAX_BOOT_STRING] = ""; /* copied string from uboot */
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char *boot_args = NULL; /* MI bootargs */
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char *boot_file = NULL; /* MI bootfile */
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uint8_t uboot_enaddr[ETHER_ADDR_LEN] = {};
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/*
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* kernel start and end from the linker
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*/
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extern char KERNEL_BASE_phys[]; /* physical start of kernel */
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extern char _end[]; /* physical end of kernel */
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#define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
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#define EXYNOS_IOPHYSTOVIRT(a) \
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((vaddr_t)(((a) - EXYNOS_CORE_PBASE) + EXYNOS_CORE_VBASE))
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/* XXX we have no framebuffer implementation yet so com is console XXX */
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int use_fb_console = false;
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/* prototypes */
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void consinit(void);
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#ifdef KGDB
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static void kgdb_port_init(void);
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#endif
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static void exynos_usb_powercycle_lan9730(device_t self);
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static void exynos_extract_mac_adress(void);
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void odroid_device_register(device_t self, void *aux);
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void odroid_device_register_post_config(device_t self, void *aux);
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/*
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* Our static device mappings at fixed virtual addresses so we can use them
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* while booting the kernel.
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*
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* Map the extents segment-aligned and segment-rounded in size to avoid L2
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* page tables
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*/
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#define _A(a) ((a) & ~L1_S_OFFSET)
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#define _S(s) (((s) + L1_S_SIZE - 1) & (~(L1_S_SIZE-1)))
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static const struct pmap_devmap e4_devmap[] = {
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{
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/* map in core IO space */
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.pd_va = _A(EXYNOS_CORE_VBASE),
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.pd_pa = _A(EXYNOS_CORE_PBASE),
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.pd_size = _S(EXYNOS4_CORE_SIZE),
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.pd_prot = VM_PROT_READ | VM_PROT_WRITE,
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.pd_cache = PTE_NOCACHE
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},
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{
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/* map in audiocore IO space */
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.pd_va = _A(EXYNOS4_AUDIOCORE_VBASE),
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.pd_pa = _A(EXYNOS4_AUDIOCORE_PBASE),
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.pd_size = _S(EXYNOS4_AUDIOCORE_SIZE),
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.pd_prot = VM_PROT_READ | VM_PROT_WRITE,
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.pd_cache = PTE_NOCACHE
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},
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{0}
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};
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static const struct pmap_devmap e5_devmap[] = {
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{
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/* map in core IO space */
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.pd_va = _A(EXYNOS_CORE_VBASE),
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.pd_pa = _A(EXYNOS_CORE_PBASE),
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.pd_size = _S(EXYNOS5_CORE_SIZE),
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.pd_prot = VM_PROT_READ | VM_PROT_WRITE,
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.pd_cache = PTE_NOCACHE
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},
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{
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/* map in audiocore IO space */
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.pd_va = _A(EXYNOS5_AUDIOCORE_VBASE),
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.pd_pa = _A(EXYNOS5_AUDIOCORE_PBASE),
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.pd_size = _S(EXYNOS5_AUDIOCORE_SIZE),
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.pd_prot = VM_PROT_READ | VM_PROT_WRITE,
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.pd_cache = PTE_NOCACHE
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},
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{0}
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};
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#undef _A
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#undef _S
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#ifdef PMAP_NEED_ALLOC_POOLPAGE
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static struct boot_physmem bp_highgig = {
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.bp_pages = (KERNEL_VM_BASE - KERNEL_BASE) / NBPG,
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.bp_freelist = VM_FREELIST_ISADMA,
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.bp_flags = 0,
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};
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#endif
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/*
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* u_int initarm(...)
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*
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* Our entry point from the assembly before main() is called.
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* - take a copy of the config we got from uboot
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* - init the physical console
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* - setting up page tables for the kernel
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*/
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u_int
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initarm(void *arg)
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{
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const struct pmap_devmap const *devmap;
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bus_addr_t rambase;
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const psize_t ram_reserve = 0x200000;
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psize_t ram_size;
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/* allocate/map our basic memory mapping */
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switch (EXYNOS_PRODUCT_FAMILY(exynos_soc_id)) {
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#if defined(EXYNOS4)
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case EXYNOS4_PRODUCT_FAMILY:
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devmap = e4_devmap;
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rambase = EXYNOS4_SDRAM_PBASE;
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break;
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#endif
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#if defined(EXYNOS5)
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case EXYNOS5_PRODUCT_FAMILY:
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devmap = e5_devmap;
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rambase = EXYNOS5_SDRAM_PBASE;
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break;
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#endif
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default:
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/* Won't work, but... */
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panic("Unknown product family %llx",
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EXYNOS_PRODUCT_FAMILY(exynos_soc_id));
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}
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pmap_devmap_register(devmap);
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/* bootstrap soc. uart_address is determined in odroid_start */
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paddr_t uart_address = armreg_tpidruro_read();
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exynos_bootstrap(EXYNOS_CORE_VBASE, EXYNOS_IOPHYSTOVIRT(uart_address));
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/* set up CPU / MMU / TLB functions */
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if (set_cpufuncs())
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panic("cpu not recognized!");
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/* get normal console working */
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consinit();
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#ifdef KGDB
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kgdb_port_init();
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#endif
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#ifdef VERBOSE_INIT_ARM
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printf("\nuboot arg = %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR"\n",
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uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
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printf("Exynos SoC ID %08x\n", exynos_soc_id);
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printf("initarm: cbar=%#x\n", armreg_cbar_read());
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#endif
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/* determine cpu0 clock rate */
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exynos_clocks_bootstrap();
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#ifdef VERBOSE_INIT_ARM
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printf("CPU0 now running on %"PRIu64" Mhz\n", exynos_get_cpufreq()/(1000*1000));
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#endif
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#if NARML2CC > 0
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if (CPU_ID_CORTEX_A9_P(curcpu()->ci_arm_cpuid)) {
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/* probe and enable the PL310 L2CC */
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const bus_space_handle_t pl310_bh =
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EXYNOS_IOPHYSTOVIRT(armreg_cbar_read());
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#ifdef ARM_TRUSTZONE_FIRMWARE
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exynos4_l2cc_init();
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#endif
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arml2cc_init(&exynos_bs_tag, pl310_bh, 0x2000);
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}
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#endif
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cpu_reset_address = exynos_wdt_reset;
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#ifdef VERBOSE_INIT_ARM
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printf("\nNetBSD/evbarm (odroid) booting ...\n");
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#endif
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#ifdef BOOT_ARGS
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char mi_bootargs[] = BOOT_ARGS;
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parse_mi_bootargs(mi_bootargs);
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#endif
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boot_args = bootargs;
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parse_mi_bootargs(boot_args);
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exynos_extract_mac_adress();
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/*
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* Determine physical memory by looking at the PoP package. This PoP
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* package ID seems to be only available on Exynos4
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*
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* First assume the default 2Gb of memory, dictated by mapping too
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*/
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ram_size = (psize_t) 0xC0000000 - 0x40000000;
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#if defined(EXYNOS4)
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switch (exynos_pop_id) {
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case EXYNOS_PACKAGE_ID_2_GIG:
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KASSERT(ram_size <= 2UL*1024*1024*1024);
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break;
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default:
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printf("Unknown PoP package id 0x%08x, assuming 1Gb\n",
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exynos_pop_id);
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ram_size = (psize_t) 0x10000000;
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}
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#endif
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/* Fake bootconfig structure for the benefit of pmap.c. */
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bootconfig.dramblocks = 1;
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bootconfig.dram[0].address = rambase;
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bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
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#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
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const bool mapallmem_p = true;
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#ifndef PMAP_NEED_ALLOC_POOLPAGE
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if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
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printf("%s: dropping RAM size from %luMB to %uMB\n",
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__func__, (unsigned long) (ram_size >> 20),
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(KERNEL_VM_BASE - KERNEL_BASE) >> 20);
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ram_size = KERNEL_VM_BASE - KERNEL_BASE;
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}
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#endif
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#else
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const bool mapallmem_p = false;
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#endif
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KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
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arm32_bootmem_init(bootconfig.dram[0].address, ram_size - ram_reserve,
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KERNEL_BASE_PHYS);
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arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, devmap,
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mapallmem_p);
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/* we've a specific device_register routine */
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evbarm_device_register = odroid_device_register;
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evbarm_device_register_post_config = odroid_device_register_post_config;
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/*
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* If we couldn't map all of memory via TTBR1, limit the memory the
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* kernel can allocate from to be from the highest available 1GB.
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*/
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#ifdef PMAP_NEED_ALLOC_POOLPAGE
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if (atop(ram_size) > bp_highgig.bp_pages) {
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bp_highgig.bp_start = rambase / NBPG
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+ atop(ram_size) - bp_highgig.bp_pages;
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bp_highgig.bp_pages -= atop(ram_reserve);
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arm_poolpage_vmfreelist = bp_highgig.bp_freelist;
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return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
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&bp_highgig, 1);
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}
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#endif
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return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
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}
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void
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consinit(void)
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{
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static bool consinit_called;
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if (consinit_called)
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return;
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consinit_called = true;
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#if NSSCOM > 0
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bus_space_tag_t bst = &exynos_bs_tag;
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bus_addr_t iobase = armreg_tpidruro_read();
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bus_space_handle_t bsh = EXYNOS_IOPHYSTOVIRT(iobase);
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u_int i;
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/*
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* No need to guess at the UART frequency since we can calculate it.
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*/
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uint32_t freq = conspeed
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* (16 * (bus_space_read_4(bst, bsh, SSCOM_UBRDIV) + 1)
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+ bus_space_read_4(bst, bsh, SSCOM_UFRACVAL));
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freq = (freq + conspeed / 2) / 1000;
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freq *= 1000;
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/* go trough all entries */
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for (i = 0; i < num_exynos_uarts_entries; i++) {
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/* attach console */
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if (exynos_uarts[i].iobase + EXYNOS_CORE_PBASE == iobase)
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break;
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}
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KASSERT(i < num_exynos_uarts_entries);
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printf("%s: attaching console @ %#"PRIxPTR" (%u HZ, %u bps)\n",
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__func__, iobase, freq, conspeed);
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if (sscom_cnattach(bst, exynos_core_bsh, &exynos_uarts[i],
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conspeed, freq, conmode))
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panic("Serial console can not be initialized");
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#ifdef VERBOSE_INIT_ARM
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printf("Console initialized\n");
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#endif
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#else
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#error only serial console is supported
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#if NUKBD > 0
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/* allow USB keyboards to become console */
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ukbd_cnattach();
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#endif /* NUKBD */
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#endif
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}
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/* extract ethernet mac address from bootargs */
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static void
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exynos_extract_mac_adress(void)
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{
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char *str, *ptr;
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int i, v1, v2, val;
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#define EXPECT_COLON() {\
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v1 = *ptr++; \
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if (v1 != ':') break; \
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}
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#define EXPECT_HEX(v) {\
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(v) = (v) >= '0' && (v) <= '9'? (v) - '0' : \
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(v) >= 'a' && (v) <= 'f'? (v) - 'a' + 10 : \
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(v) >= 'A' && (v) <= 'F'? (v) - 'A' + 10 : -1; \
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if ((v) < 0) break; \
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}
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#define EXPECT_2HEX(val) {\
|
|
v1 = *ptr++; EXPECT_HEX(v1); \
|
|
v2 = *ptr++; EXPECT_HEX(v2); \
|
|
val = (v1 << 4) | v2; \
|
|
}
|
|
if (get_bootconf_option(boot_args, "ethaddr",
|
|
BOOTOPT_TYPE_STRING, &str)) {
|
|
for (i = 0, ptr = str; i < sizeof(uboot_enaddr); i++) {
|
|
if (i)
|
|
EXPECT_COLON();
|
|
EXPECT_2HEX(val);
|
|
uboot_enaddr[i] = val;
|
|
}
|
|
if (i != sizeof(uboot_enaddr)) {
|
|
printf( "Ignoring invalid MAC address '%s' passed "
|
|
"as boot paramter `ethaddr'\n", str);
|
|
memset((char *) uboot_enaddr, 0, sizeof(uboot_enaddr));
|
|
}
|
|
}
|
|
#undef EXPECT_2HEX
|
|
#undef EXPECT_HEX
|
|
#undef EXPECT_COLON
|
|
}
|
|
|
|
|
|
#ifdef EXYNOS4
|
|
static void
|
|
odroid_exynos4_gpio_ncs(device_t self, prop_dictionary_t dict) {
|
|
/*
|
|
* These pins have no connections; the 1st is a raw values that is
|
|
* generated by the gpio bootstrap and the values substracted are
|
|
* explicitly allowed
|
|
*/
|
|
/* i2c at pin 6,7 */
|
|
prop_dictionary_set_uint32(dict, "nc-GPA0", 0xff - 0b11000000);
|
|
/* p3v3 enable on pin 3 */
|
|
prop_dictionary_set_uint32(dict, "nc-GPA1", 0x3f - 0b00001000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPB", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPC0", 0x1f - 0b00000000);
|
|
/* blue led at bit 0 : heartbeat */
|
|
prop_dictionary_set_uint32(dict, "nc-GPC1", 0x1f - 0b00000001);
|
|
prop_dictionary_set_uint32(dict, "nc-GPD0", 0x0f - 0b00000000);
|
|
/* i2c0 at pin 0,1 and i2c1 at pin 2,3 : */
|
|
prop_dictionary_set_uint32(dict, "nc-GPD1", 0x0f - 0b00001111);
|
|
prop_dictionary_set_uint32(dict, "nc-GPF0", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPF1", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPF2", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPF3", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPJ0", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPJ1", 0x1f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPK0", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPK1", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPK2", 0x7f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPK3", 0x7f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPL0", 0x7f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPL1", 0x03 - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPL2", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY0", 0x3f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY1", 0x0f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY2", 0x3f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY3", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY4", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY5", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY6", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-ETC0", 0x3f - 0b00000000);
|
|
/* standard Xuhost bits at pin 6,7 */
|
|
prop_dictionary_set_uint32(dict, "nc-ETC6", 0xff - 0b11000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPM0", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPM1", 0x7f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPM2", 0x1f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPM3", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPM4", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPX0", 0xff - 0b00000000);
|
|
/* expansion connector bits at pin 0,1,5 : */
|
|
prop_dictionary_set_uint32(dict, "nc-GPX1", 0xff - 0b00100011);
|
|
prop_dictionary_set_uint32(dict, "nc-GPX2", 0xff - 0b00000000);
|
|
/* usb hub communication at pin 0,4,5 : */
|
|
prop_dictionary_set_uint32(dict, "nc-GPX3", 0xff - 0b00110001);
|
|
prop_dictionary_set_uint32(dict, "nc-GPZ", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPV0", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPV1", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-ETC7", 0x03 - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPV2", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPV3", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-ETC8", 0x03 - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPV4", 0x03 - 0b00000000);
|
|
}
|
|
#endif
|
|
|
|
|
|
#ifdef EXYNOS5
|
|
static void
|
|
odroid_exynos5_gpio_ncs(device_t self, prop_dictionary_t dict) {
|
|
/*
|
|
* These pins have no connections; the 1st is a raw values that is
|
|
* generated by the gpio bootstrap and the values substracted are
|
|
* explicitly allowed
|
|
*/
|
|
/* i2c2 at pin 6,7 */
|
|
prop_dictionary_set_uint32(dict, "nc-GPA0", 0xff - 0b11000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPA1", 0x3f - 0b00000000);
|
|
/* i2c4 at pin 0,1 */
|
|
prop_dictionary_set_uint32(dict, "nc-GPA2", 0xff - 0b00000011);
|
|
prop_dictionary_set_uint32(dict, "nc-GPB0", 0x1f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPB1", 0x1f - 0b00000000);
|
|
/* green led at bit 1 : eMMC activity */
|
|
/* red led at bit 2 : heartbeat */
|
|
prop_dictionary_set_uint32(dict, "nc-GPB2", 0x0f - 0b00000110);
|
|
/* i2c1 at pin 2,3 */
|
|
prop_dictionary_set_uint32(dict, "nc-GPB3", 0x0f - 0b00001100);
|
|
prop_dictionary_set_uint32(dict, "nc-GPC0", 0x7f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPC1", 0x0f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPC2", 0x7f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPC3", 0x7f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPD0", 0x0f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPD1", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY0", 0x3f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY1", 0x0f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY2", 0x3f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY3", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY4", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY5", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPY6", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-ETC0", 0x3f - 0b00000000);
|
|
/* standard Xuhost bits at pin 5,6 */
|
|
prop_dictionary_set_uint32(dict, "nc-ETC6", 0x7f - 0b01100000);
|
|
prop_dictionary_set_uint32(dict, "nc-ETC7", 0x1f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPC4", 0x3f - 0b00000000);
|
|
/* usb hub communication at bit 6,7 : */
|
|
prop_dictionary_set_uint32(dict, "nc-GPX0", 0xff - 0b11000000);
|
|
/* usb hub communication at bit 4 : */
|
|
prop_dictionary_set_uint32(dict, "nc-GPX1", 0xff - 0b00010000);
|
|
/* blue led at bit 3 : microSD activity */
|
|
prop_dictionary_set_uint32(dict, "nc-GPX2", 0xff - 0b00001000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPX3", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPE0", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPE1", 0x03 - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPF0", 0x0f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPF1", 0x0f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPG0", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPG1", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPG2", 0x03 - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPH0", 0x0f - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPH1", 0xff - 0b00000000);
|
|
|
|
prop_dictionary_set_uint32(dict, "nc-GPJ0", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPJ1", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPJ2", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPJ3", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPJ4", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPK0", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPK1", 0xff - 0b00000000);
|
|
/* usb3 overcur1{2,3} at bits 4,5, vbus1 at pin 7 */
|
|
prop_dictionary_set_uint32(dict, "nc-GPK2", 0xff - 0b10110000);
|
|
/* usb3 overcur0{2,3} at bits 0,1, vbus0 at pin 3 */
|
|
prop_dictionary_set_uint32(dict, "nc-GPK3", 0xff - 0b00001011);
|
|
|
|
prop_dictionary_set_uint32(dict, "nc-GPV0", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPV1", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-ETC5", 0x03 - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPV2", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPV3", 0xff - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-ETC8", 0x03 - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPV4", 0x03 - 0b00000000);
|
|
prop_dictionary_set_uint32(dict, "nc-GPZ", 0x7f - 0b00000000);
|
|
}
|
|
#endif
|
|
|
|
|
|
void
|
|
odroid_device_register(device_t self, void *aux)
|
|
{
|
|
prop_dictionary_t dict = device_properties(self);
|
|
|
|
exynos_device_register(self, aux);
|
|
|
|
if (device_is_a(self, "sscom")) {
|
|
if (use_fb_console)
|
|
prop_dictionary_set_bool(dict, "is_console", false);
|
|
}
|
|
|
|
if (device_is_a(self, "mct"))
|
|
prop_dictionary_set_cstring(dict, "heartbeat", "led1");
|
|
|
|
if (device_is_a(self, "exyousb")) {
|
|
prop_dictionary_set_cstring(dict, "nreset", "hub_nreset");
|
|
prop_dictionary_set_cstring(dict, "hubconnect", "hub_connect");
|
|
prop_dictionary_set_cstring(dict, "nint", "hub_nint");
|
|
prop_dictionary_set_cstring(dict, "lan_power", "p3v3_en");
|
|
}
|
|
|
|
if (device_is_a(self, "usmsc")) {
|
|
prop_data_t blob =
|
|
prop_data_create_data(uboot_enaddr, ETHER_ADDR_LEN);
|
|
if (prop_dictionary_set(dict, "mac-address", blob) == false) {
|
|
aprint_error_dev(self,
|
|
"WARNING: unable to set mac-address property\n");
|
|
}
|
|
prop_object_release(blob);
|
|
}
|
|
|
|
#ifdef EXYNOS4
|
|
if (device_is_a(self, "exyogpio")) {
|
|
/* unused bits */
|
|
odroid_exynos4_gpio_ncs(self, dict);
|
|
|
|
/* explicit pin settings */
|
|
prop_dictionary_set_cstring(dict, "led1", ">GPC1[0]");
|
|
|
|
prop_dictionary_set_cstring(dict, "hub_nreset", ">GPX3[5]");
|
|
prop_dictionary_set_cstring(dict, "hub_connect", ">GPX3[4]");
|
|
prop_dictionary_set_cstring(dict, "hub_nint", "<GPX3[0]");
|
|
|
|
prop_dictionary_set_cstring(dict, "p3v3_en", ">GPA1[3]");
|
|
}
|
|
if (device_is_a(self, "exyoiic")) {
|
|
prop_dictionary_set_bool(dict, "iic0_enable", true);
|
|
prop_dictionary_set_bool(dict, "iic1_enable", true);
|
|
prop_dictionary_set_bool(dict, "iic2_enable", true);
|
|
/* IIC3 not used (NC) */
|
|
/* IIC4 not used (NC) */
|
|
/* IIC5 not used (NC) */
|
|
/* IIC6 used differently (SCLK used as led1) */
|
|
/* IIC7 used differently (PWM, though NC) */
|
|
/* IIC8 HDMI, not possible trough GPIO */
|
|
}
|
|
#endif
|
|
#ifdef EXYNOS5
|
|
if (device_is_a(self, "exyogpio")) {
|
|
/* unused bits */
|
|
odroid_exynos5_gpio_ncs(self, dict);
|
|
|
|
/* explicit pin settings */
|
|
prop_dictionary_set_cstring(dict, "hub_nreset", ">GPX1[4]");
|
|
prop_dictionary_set_cstring(dict, "hub_connect", ">GPX0[6]");
|
|
prop_dictionary_set_cstring(dict, "hub_nint", "<GPX0[7]");
|
|
|
|
/* internal hub IIRC, unknown if this line exists */
|
|
//prop_dictionary_set_cstring(dict, "p3v3_en", ">GPA1[3]");
|
|
}
|
|
if (device_is_a(self, "exyoiic")) {
|
|
/* IIC0 not used (NC) */
|
|
prop_dictionary_set_bool(dict, "iic1_enable", true);
|
|
prop_dictionary_set_bool(dict, "iic2_enable", true);
|
|
/* IIC3 not used (NC) */
|
|
prop_dictionary_set_bool(dict, "iic4_enable", true);
|
|
/* IIC5 not used (NC) */
|
|
/* IIC6 used differently (SCLK used as led1) */
|
|
/* IIC7 used differently (PWM, though NC) */
|
|
/* IIC8 HDMI, not possible trough GPIO */
|
|
}
|
|
#endif
|
|
}
|
|
|
|
|
|
static void
|
|
exynos_usb_init_usb3503_hub(device_t self)
|
|
{
|
|
prop_dictionary_t dict = device_properties(self);
|
|
const char *pin_nreset, *pin_hubconnect, *pin_nint;
|
|
struct exynos_gpio_pindata nreset_pin, hubconnect_pin, nint_pin;
|
|
int ok1, ok2, ok3;
|
|
|
|
prop_dictionary_get_cstring_nocopy(dict, "nreset", &pin_nreset);
|
|
prop_dictionary_get_cstring_nocopy(dict, "hubconnect", &pin_hubconnect);
|
|
prop_dictionary_get_cstring_nocopy(dict, "nint", &pin_nint);
|
|
if (!(pin_nreset && pin_hubconnect && pin_nint)) {
|
|
aprint_error_dev(self,
|
|
"failed to lookup GPIO pins for usb3503 hub init");
|
|
return;
|
|
}
|
|
|
|
ok1 = exynos_gpio_pin_reserve(pin_nreset, &nreset_pin);
|
|
ok2 = exynos_gpio_pin_reserve(pin_hubconnect, &hubconnect_pin);
|
|
ok3 = exynos_gpio_pin_reserve(pin_nint, &nint_pin);
|
|
if (!ok1)
|
|
aprint_error_dev(self,
|
|
"can't reserve GPIO pin %s\n", pin_nreset);
|
|
if (!ok2)
|
|
aprint_error_dev(self,
|
|
"can't reserve GPIO pin %s\n", pin_hubconnect);
|
|
if (!ok3)
|
|
aprint_error_dev(self,
|
|
"can't reserve GPIO pin %s\n", pin_nint);
|
|
if (!(ok1 && ok2 && ok3))
|
|
return;
|
|
|
|
/* reset pin to zero */
|
|
exynos_gpio_pindata_write(&nreset_pin, 0);
|
|
DELAY(10000);
|
|
|
|
/* pull intn low */
|
|
exynos_gpio_pindata_ctl(&nint_pin, GPIO_PIN_PULLDOWN);
|
|
|
|
/* set hubconnect low */
|
|
exynos_gpio_pindata_write(&hubconnect_pin, 0);
|
|
|
|
/* reset pin up again, hub enters RefClk stage */
|
|
exynos_gpio_pindata_write(&nreset_pin, 1);
|
|
DELAY(10000);
|
|
|
|
/* release intn */
|
|
exynos_gpio_pindata_ctl(&nint_pin, GPIO_PIN_TRISTATE);
|
|
|
|
/* set hubconnect high */
|
|
exynos_gpio_pindata_write(&hubconnect_pin, 1);
|
|
DELAY(40000);
|
|
|
|
/* DONE! */
|
|
}
|
|
|
|
|
|
#if 0
|
|
static void
|
|
exynos_max77686_dump(struct i2c_controller *i2c)
|
|
{
|
|
int error;
|
|
|
|
printf("%s:\n", __func__);
|
|
for (int i = 0; i < 0x80; i++) {
|
|
error = iic_exec(i2c, I2C_OP_READ_WITH_STOP, 0x09, &i, 1,
|
|
&rdata, sizeof(rdata), 0);
|
|
KASSERT(!error);
|
|
if (i % 16 == 0)
|
|
printf("\n%02x: ", i);
|
|
printf("%02x ", rdata);
|
|
}
|
|
printf("\n");
|
|
}
|
|
#endif
|
|
|
|
|
|
static void
|
|
exynos_usb_powercycle_lan9730(device_t self)
|
|
{
|
|
#ifdef EXYNOS4
|
|
prop_dictionary_t dict = device_properties(self);
|
|
struct exynos_gpio_pindata enable_pin;
|
|
struct i2c_controller *i2c;
|
|
const char *pin_enable;
|
|
uint8_t rdata, wdata, reg;
|
|
int error __diagused;
|
|
bool ok;
|
|
|
|
/*
|
|
* XXX fixed for now:
|
|
* Odroid-U2/U3 : Max77686 chip is attached to iic0 chipid 0x09
|
|
*/
|
|
const int iicbus = 0;
|
|
const int chipid = 0x09;
|
|
const int buck_outreg = 0x37; /* buck 8 output voltage */
|
|
const int buck_ctlreg = 0x38; /* buck 8 power control */
|
|
|
|
i2c = exynos_i2cbus[iicbus];
|
|
KASSERT(i2c);
|
|
iic_acquire_bus(i2c, 0);
|
|
|
|
/* set power level to 0v */
|
|
reg = buck_outreg;
|
|
wdata = 0x0;
|
|
error = iic_exec(i2c, I2C_OP_WRITE_WITH_STOP, chipid, ®, 1,
|
|
&wdata, sizeof(wdata), 0);
|
|
KASSERT(!error);
|
|
DELAY(20000);
|
|
|
|
/* set power level back to 3.3v */
|
|
wdata = 0x33;
|
|
error = iic_exec(i2c, I2C_OP_WRITE_WITH_STOP, chipid, ®, 1,
|
|
&wdata, sizeof(wdata), 0);
|
|
KASSERT(!error);
|
|
DELAY(20000);
|
|
|
|
/* enable the bucket explicitly */
|
|
reg = buck_ctlreg;
|
|
error = iic_exec(i2c, I2C_OP_READ_WITH_STOP, chipid, ®, 1,
|
|
&rdata, sizeof(rdata), 0);
|
|
KASSERT(!error);
|
|
rdata |= 3;
|
|
error = iic_exec(i2c, I2C_OP_WRITE_WITH_STOP, chipid, ®, 1,
|
|
&rdata, sizeof(rdata), 0);
|
|
KASSERT(!error);
|
|
DELAY(30000);
|
|
|
|
iic_release_bus(i2c, 0);
|
|
|
|
/* enable lan chip power */
|
|
prop_dictionary_get_cstring_nocopy(dict, "lan_power", &pin_enable);
|
|
if (pin_enable) {
|
|
ok = exynos_gpio_pin_reserve(pin_enable, &enable_pin);
|
|
if (!ok) {
|
|
aprint_error_dev(self,
|
|
"can't reserve GPIO pin %s\n", pin_enable);
|
|
} else {
|
|
exynos_gpio_pindata_write(&enable_pin, 0);
|
|
DELAY(30000);
|
|
exynos_gpio_pindata_write(&enable_pin, 1);
|
|
DELAY(30000);
|
|
}
|
|
} else {
|
|
aprint_error_dev(self, "failed to lookup lan_power GPIO pin");
|
|
}
|
|
#endif
|
|
}
|
|
|
|
|
|
void
|
|
odroid_device_register_post_config(device_t self, void *aux)
|
|
{
|
|
exynos_device_register_post_config(self, aux);
|
|
|
|
if (device_is_a(self, "exyousb")) {
|
|
exynos_usb_powercycle_lan9730(self);
|
|
exynos_usb_init_usb3503_hub(self);
|
|
}
|
|
}
|
|
|
|
|
|
/*
|
|
* Odroid specific tweaks
|
|
*/
|
|
/*
|
|
* The external USB devices are clocked trough the DEBUG clkout
|
|
* XXX is this Odroid specific? XXX
|
|
*/
|
|
void
|
|
exynos_init_clkout_for_usb(void)
|
|
{
|
|
#ifdef EXYNOS4
|
|
/* Select XUSBXTI as source for CLKOUT */
|
|
bus_space_write_4(&exynos_bs_tag, exynos_pmu_bsh,
|
|
EXYNOS_PMU_DEBUG_CLKOUT, 0x900);
|
|
#endif
|
|
#ifdef EXYNOS5
|
|
/* Select XUSBXTI as source for CLKOUT */
|
|
bus_space_write_4(&exynos_bs_tag, exynos_pmu_bsh,
|
|
EXYNOS_PMU_DEBUG_CLKOUT, 0x1000);
|
|
#endif
|
|
}
|
|
|