134 lines
5.0 KiB
C
134 lines
5.0 KiB
C
/* $NetBSD: vsbus.h,v 1.3 1998/06/07 18:34:09 ragge Exp $ */
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/*
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* Copyright (c) 1996 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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*
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* This code is derived from software contributed to Ludd by Bertram Barth.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed at Ludd, University of
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* Lule}, Sweden and its contributors.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Generic definitions for the (virtual) vsbus. contains common info
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* used by all VAXstations.
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*/
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struct confargs {
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char ca_name[16]; /* device name */
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int ca_intslot; /* device interrupt-slot */
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int ca_intpri; /* device interrupt "priority" */
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int ca_intvec; /* interrup-vector offset */
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int ca_intbit; /* bit in interrupt-register */
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int ca_ioaddr; /* device hardware I/O address */
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int ca_aux1; /* additional info (DMA, etc.) */
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int ca_aux2;
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int ca_aux3;
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int ca_aux4;
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int ca_aux5;
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int ca_aux6;
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int ca_aux7;
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int ca_aux8;
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#define ca_recvslot ca_intslot /* DC/DZ: Receiver configuration */
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#define ca_recvpri ca_intpri
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#define ca_recvvec ca_intvec
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#define ca_recvbit ca_intbit
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#define ca_xmitslot ca_aux1 /* DC/DZ: transmitter configuration */
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#define ca_xmitpri ca_aux2 /* DC/DZ: */
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#define ca_xmitvec ca_aux3
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#define ca_xmitbit ca_aux4
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#define ca_dcflags ca_aux5
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#define ca_dareg ca_aux1 /* SCSI: DMA address register */
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#define ca_dcreg ca_aux2 /* SCSI: DMA byte count register */
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#define ca_ddreg ca_aux3 /* SCSI: DMA transfer direction */
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#define ca_dbase ca_aux4 /* SCSI: DMA buffer address */
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#define ca_dsize ca_aux5 /* SCSI: DMA buffer size */
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#define ca_dflag ca_aux6 /* SCSI: DMA flags (eg. shared) */
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#define ca_idval ca_aux7 /* SCSI: host-ID to use/set */
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#define ca_idreg ca_aux8 /* SCSI: host-ID port register */
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#define ca_enaddr ca_aux1 /* LANCE: Ethernet address in ROM */
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#define ca_leflags ca_aux2
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};
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struct vsbus_attach_args {
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int va_type;
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};
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/*
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* Some chip addresses and constants, same on all VAXstations.
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*/
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#define NI_ADDR 0x20090000 /* Ethernet address */
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#define DZ_CSR 0x200a0000 /* DZ11-compatible chip csr */
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#define VS_CLOCK 0x200b0000 /* clock chip address */
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#define NI_BASE 0x200e0000 /* LANCE CSRs */
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#define NI_IOSIZE (128 * NBPG) /* IO address size */
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#define VS_REGS 0x20080000 /* Misc cpu internal regs */
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/*
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* Small monochrome graphics framebuffer, present on all machines.
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*/
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#define SMADDR 0x30000000
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#define SMSIZE 0x20000 /* Actually 256k, only 128k used */
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/*
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* interrupt vector numbers
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*/
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#define IVEC_BASE 0x20040020
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#define IVEC_SR 0x000002C0
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#define INR_SR 7
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#define IVEC_ST 0x000002C4
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#define INR_ST 6
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#define IVEC_NP 0x00000250
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#define INR_NP 5
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#define IVEC_NS 0x00000254
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#define INR_NS 4
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#define IVEC_VF 0x00000244
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#define INR_VF 3
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#define IVEC_VS 0x00000248
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#define INR_VS 2
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#define IVEC_SC 0x000003F8
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#define INR_SC 1
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#define IVEC_DC 0x000003FC
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#define INR_DC 0
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caddr_t dz_regs; /* On-board serial line */
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caddr_t le_iomem; /* base addr of RAM -- CPU's view */
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short *lance_csr; /* LANCE CSR virtual address */
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int *lance_addr; /* Ethernet address */
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struct vs_cpu *vs_cpu; /* Common CPU registers */
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caddr_t sm_addr; /* virtual address of graphic space */
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void vsbus_intr_enable __P((int));
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void vsbus_intr_disable __P((int));
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void vsbus_intr_attach __P((int, void(*)(int), int));
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int vsbus_lockDMA __P((struct confargs *));
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int vsbus_unlockDMA __P((struct confargs *));
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